Message-ID: <ef034248-156f-7a66-e4f1-a717ce8705ee@linux.intel.com>
Date:   Mon, 12 Nov 2018 13:38:39 +0800
From:   "Li, Aubrey" <aubrey.li@...ux.intel.com>
To:     Dave Hansen <dave.hansen@...el.com>,
        Aubrey Li <aubrey.li@...el.com>, tglx@...utronix.de,
        mingo@...hat.com, peterz@...radead.org, hpa@...or.com
Cc:     ak@...ux.intel.com, tim.c.chen@...ux.intel.com,
        arjan@...ux.intel.com, linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH v2 1/2] x86/fpu: detect AVX task

Hi Dave,

Thanks for your comments!

On 2018/11/12 10:32, Dave Hansen wrote:
> On 11/7/18 9:16 AM, Aubrey Li wrote:
>> XSAVES and its variants use init optimization to reduce the amount of
>> data that they save to memory during context switch. Init optimization
>> uses the state component bitmap to denote if a component is in its init
>> configuration. We use this information to detect if a task contains AVX
>> instructions.
> 
> I'm a little uncomfortable with changelogs like this.  Someone might
> read this and think that this patch precisely detects AVX instructions.
>  It would be great is we could make this more precise to say that this
> patch detects if there is valid state in the AVX registers, *not* if the
> task contains or uses AVX instructions.

Our intention is to figure out if the task contains AVX instructions, this
kind of task causes frequency drop and need attention when dispatched.

If there is a valid state in the AVX registers, we can say the tasks contains
AVX instructions, can't we?

>>  
>> +#define	AVX_STATE_DECAY_COUNT	3
> 
> How was this number chosen?  What does this mean?
> 
> It appears that this is saying that after 3 non-AVX-512-using context
> switches, the task is not considered to be using AVX512 any more.  That
> seems a bit goofy because the context switch rate is highly dependent on
> HZ, and on how often the task yields.
> 
> Do we want this, or do we want something more time-based?
>
This counter is introduced here to solve the race of context switch and
VZEROUPPER. 3 context switches mean the same thread is on-off CPU 3 times.
Due to scheduling latency, 3 jiffies could only happen AVX task on-off just
1 time. So IMHO the context switches number is better here.

> 
>> +/*
>> + * This function is called during context switch to update AVX component state
>> + */
>> +static inline void update_avx_state(struct avx_state *avx)
>> +{
>> +	/*
>> +	 * Check if XGETBV with ECX = 1 supported. XGETBV with ECX = 1
>> +	 * returns the logical-AND of XCR0 and XINUSE. XINUSE is a bitmap
>> +	 * by which the processor tracks the status of various components.
>> +	 */
>> +	if (!use_xgetbv1()) {
>> +		avx->state = 0;
>> +		return;
>> +	}
> 
> This is a place where we have conflated the implementation in the CPU
> and the logical operation that we are performing.
> 
> In this case, it appears that we want to know whether AVX state
> detection is available, but we're doing that with a function that's
> apparently asking if the kernel is using XGETBV1.
> 
> I'd really like if this looked like this:
> 
> 	if (!have_avx_state_detect()) {
> 		avx->state = 0;
> 		return;
> 	}
> 
> Then, in have_avx_state_detect(), explain what XGETBV1 does.  BTW, I
> don't think we *totally* need to duplicate the SDM definitions in kernel
> code for each instruction.  It's fine to just say that it set 1 for
> features not in the init state.
> 

Thomas suggested open this inline since this is only usage of xgetbv1. So I'll
use static_cpu_has() here directly. Does it sound good?

>> +	/*
>> +	 * XINUSE is dynamic to track component state because VZEROUPPER
>> +	 * happens on every function end and reset the bitmap to the
>> +	 * initial configuration.
> 
> This is confusing to me because VZEROUPPER is not apparently involved
> here.  What is this trying to say?
> 
VZERROUPPER instruction in the task resets the bitmap.


>> +	 * State decay is introduced to solve the race condition between
>> +	 * context switch and a function end. State is aggressively set
>> +	 * once it's detected but need to be cleared by decay 3 context
>> +	 * switches
>> +	 */
> 
> I'd probably say:
> 
> 	AVX512-using processes frequently set AVX512 back to the init 	
> 	state themselves.  Thus, this detection mechanism can miss.
> 	The decay ensures that false-negatives do not immediately make
> 	a task be considered as not using AVX512.

Thanks, will refine it in the next version.
And yes, AVX512-using processoes set AVX512 back to the init state themselves
by VZEROUPPER instructions.

> 
>> +	if (xgetbv(XINUSE_STATE_BITMAP_INDEX) & XFEATURE_MASK_Hi16_ZMM) {
> 
> This is *just* an AVX512 state, right?  That isn't reflected in any
> comments or naming.  Also, why just this state, and not any of the other
> AVX512-related states?

Only this state causes significant frequency drop, other states not.
> 
> This is also precisely the kind of thing that would be nice to wrap up
> in a tiny helper.
> 
> 	if (avx512_in_use())
> 
> is much more self-documenting, for instance.

Thanks, will refine it in the next version.

> 
>> +		avx->state = 1;
> 
> I'm not a huge fan of this naming.  Could this be:
> 
> 		avx->had_avx_512_state = true;
> 
>> +		avx->decay_count = AVX_STATE_DECAY_COUNT;
>> +	} else {
>> +		if (avx->decay_count)
>> +			avx->decay_count--;
>> +		else
>> +			avx->state = 0;
>> +	}
>> +}
> 
> This all needs a bunch more commenting.  The state transitions are not
> horribly clear.

Thanks, will refine it in next version.
> 
>>  /*
>>   * This function is called only during boot time when x86 caps are not set
>>   * up and alternative can not be used yet.
>> @@ -411,6 +481,7 @@ static inline int copy_fpregs_to_fpstate(struct fpu *fpu)
>>  {
>>  	if (likely(use_xsave())) {
>>  		copy_xregs_to_kernel(&	);
>> +		update_avx_state(&fpu->avx);
>>  		return 1;
>>  	}
> 
> I'm not sure why update_avx_state() goes to the trouble of calling
> XGETBV1.  I believe the exact same state is captured in the 'xfeatures'
> field in the XSAVE buffer after copy_xregs_to_kernel().  Why bother
> calling the instruction when you can get the data from memory?

Thanks to point this out, I'll check this.
> 
>>  /*
>> + * This is per task AVX state data structure that indicates
>> + * whether the task uses AVX instructions.
>> + */
> 
> Here's another spot that doesn't precisely capture how his detection
> mechanism works.
> 
>> +struct avx_state {
>> +	unsigned int			state;
> 
> Isn't state a 0/1 thing?
> 
>> +	unsigned int			decay_count;
>> +};
> 
> Doesn't this max out at 3?
> 
> Seems like we're storing about three bits of data in 64 bits of space.
> Not a huge deal, but I think we can do better?
> 
> Also, do we really even need 'state'?
> 
> When would its value be different than
> 
> 	fpu->state.xsave.xfeatures & XFEATURE_MASK_Hi16_ZMM

okay, will refine in the next version

> 
>> +/*
>>   * Highest level per task FPU state data structure that
>>   * contains the FPU register state plus various FPU
>>   * state fields:
>> @@ -303,6 +312,14 @@ struct fpu {
>>  	unsigned char			initialized;
>>  
>>  	/*
>> +	 * @avx_state:
>> +	 *
>> +	 * This data structure indicates whether this context
>> +	 * contains AVX states
>> +	 */
> 
> Yeah, that's precisely what fpu->state.xsave.xfeatures does. :)
> I see, will refine in the next version

Thanks,
-Aubrey

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