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Message-Id: <20181112130040.18793-1-shawn.guo@linaro.org>
Date: Mon, 12 Nov 2018 21:00:38 +0800
From: Shawn Guo <shawn.guo@...aro.org>
To: Kishon Vijay Abraham I <kishon@...com>
Cc: Rob Herring <robh+dt@...nel.org>,
Sriharsha Allenki <sallenki@...eaurora.org>,
Anu Ramanathan <anur@...eaurora.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Vinod Koul <vkoul@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Shawn Guo <shawn.guo@...aro.org>
Subject: [PATCH v2 0/2] Add Synopsys High-Speed USB PHY driver for Qualcomm SoCs
It's based on a downstream driver from Sriharsha Allenki <sallenki@...eaurora.org>
that uses USB phy framework, and gets rewrote to adpot generic phy
framework together with quite some cleanups.
Changes for v2:
- Add a pointer to phy/phy-bindings.txt for property #phy-cells.
- Roll back voltage settings in case function
qcom_snps_hsphy_config_regulators() fails in the middle.
- Add a comment for init-seq tuple which consists of 3 numbers.
- Sort include headers alphabetically.
- Sort register definitions in order of offset.
Shawn Guo (1):
phy: qualcomm: Add Synopsys High-Speed USB PHY driver
Sriharsha Allenki (1):
dt-bindings: phy: Add Qualcomm Synopsys High-Speed USB PHY binding
.../phy/qcom,snps-28nm-usb-hs-phy.txt | 101 ++++
drivers/phy/qualcomm/Kconfig | 10 +
drivers/phy/qualcomm/Makefile | 1 +
.../phy/qualcomm/phy-qcom-usb-hs-snsp-28nm.c | 505 ++++++++++++++++++
4 files changed, 617 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt
create mode 100644 drivers/phy/qualcomm/phy-qcom-usb-hs-snsp-28nm.c
--
2.18.0
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