linux-kernel - [PATCH v3 0/3] MIPS: SiByte: Handle PCI DMA with 64-bit memory addressing

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Message-ID: <alpine.LFD.2.21.1811131653160.9637@eddie.linux-mips.org>
Date:   Tue, 13 Nov 2018 22:42:17 +0000 (GMT)
From:   "Maciej W. Rozycki" <macro@...ux-mips.org>
To:     Ralf Baechle <ralf@...ux-mips.org>,
        Paul Burton <paul.burton@...s.com>
cc:     Christoph Hellwig <hch@....de>, linux-mips@...ux-mips.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v3 0/3] MIPS: SiByte: Handle PCI DMA with 64-bit memory
 addressing

Hi,

 This mini patch series enables correct support for DMA in the presence of 
memory outside the 32-bit address range with the Broadcom SiByte SOCs and 
the relevant development boards.

 There is a quirk in the BCM1250, BCM1125 and BCM1125H SOCs in that their 
onchip 32-bit PCI host bridge does not support DAC, however the HT link 
(where available) does support 40-bit addressing as per the HT spec.  
Therefore the first patch sets the bus mask accordingly, and then the 
second patch enables swiotlb.  See individual change descriptions for 
additional details; there's also a further discussion alongside.

 This has been verified with a Broadcom SWARM board equipped with 3200MiB 
of RAM (2176MiB of which the address decoder in the SOC maps above 4GiB), 
a pair of DEFPA FDDI adapters and an XHCI USB adapter.  There were also 
some other PCI and PCIe devices present in the system, though not actively 
used beyond being probed at boot, and none has shown any symptoms of 
breakage.

 I have come across commit 9d7a224b463e ("dma-direct: always allow dma 
mask <= physiscal memory size") and realised we do need ZONE_DMA32 for 
LittleSur.  Hence this v3, adding a third (second in the series) change 
for LittleSur.

 Also hopefully I'll have sorted out issues with threading in my MUA with 
this series update.

 Please apply.

  Maciej