lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Thu, 15 Nov 2018 10:13:28 +0100
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Peter Korsgaard <peter@...sgaard.com>,
        Jerome Brunet <jbrunet@...libre.com>
Cc:     Kevin Hilman <khilman@...libre.com>,
        Carlo Caione <carlo@...one.org>,
        linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH RESEND 2/2] arm64: dts: meson: add libretech aml-s805x-ac
 board

On 14/11/2018 15:37, Peter Korsgaard wrote:
>>>>>> "Jerome" == Jerome Brunet <jbrunet@...libre.com> writes:
> 
>  > From: Neil Armstrong <narmstrong@...libre.com>
>  > Add Libretech aml-s805x-ac board (aka 'La Frite') support
> 
>  > Signed-off-by: Neil Armstrong <narmstrong@...libre.com>
>  > Signed-off-by: Jerome Brunet <jbrunet@...libre.com>
>  > ---
> 
> ..
> 
>  > +#include "meson-gxl-s905x.dtsi"
>  > +
>  > +/ {
>  > +	compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
>  > +		     "amlogic,meson-gxl";
>  > +	model = "Libre Computer Board AML-S805X-AC";
> 
> No mention of 'La Frite'?

It's a codename, the actual product name is AML-S805X-AC

> 
>  > +	memory@0 {
>  > +		device_type = "memory";
>  > +		reg = <0x0 0x0 0x0 0x20000000>;
>  > +	};
> 
> Maybe add a comment that there's 1GB variants as well?

Like other board, we set the minimal encountered memory size in DT,
the bootloader will update it to the actual memory size.

> 
>> +
>  > +	vcck: regulator-vcck {
>  > +		compatible = "regulator-fixed";
>  > +		regulator-name = "VCCK";
>  > +		regulator-min-microvolt = <3300000>;
>  > +		regulator-max-microvolt = <3300000>;
>  > +		vin-supply = <&dc_5v>;
>  > +
>  > +		/*
>  > +		 * This is controlled by GPIOAO_9 we reserve this but
>  > +		 * claiming it as done bellow reset the board anyway
> 
> s/bellow/below/

Good catch !

> 
>  > +&spifc {
>  > +	status = "okay";
>  > +	pinctrl-0 = <&nor_pins>;
>  > +	pinctrl-names = "default";
>  > +
>  > +	w25q32: spi-flash@0 {
>  > +		#address-cells = <1>;
>  > +		#size-cells = <1>;
>  > +		compatible = "jedec,spi-nor";
>  > +		reg = <0>;
>  > +		spi-max-frequency = <3000000>;
> 
> Is this 3MHz a limitation of the flash, board layout or SPI controller?
> 

It's the stable clock frequency used by amlogic to access to SPI flash,
we prefer using a safe freq, because we don't need fast access here.

Neil

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ