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Message-ID: <CAGb2v67QgaeAMPrPagHnn9+gw2hsY7z=pA4bgOg=wSbEnG86Dw@mail.gmail.com>
Date: Thu, 15 Nov 2018 23:53:21 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Cc: Linux Media Mailing List <linux-media@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
devel@...verdev.osuosl.org,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Maxime Ripard <maxime.ripard@...tlin.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-sunxi@...glegroups.com, Hans Verkuil <hverkuil@...all.nl>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 04/15] soc: sunxi: sram: Enable EMAC clock access for H3 variant
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
<paul.kocialkowski@...tlin.com> wrote:
>
> Just like the A64 and H5, the H3 SoC uses the system control block
> to enable the EMAC clock.
>
> Add a variant structure definition for the H3 and use it over the A10
> one. This will allow using the H3-specific binding for the syscon node
> attached to the EMAC instead of the generic syscon binding.
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Reviewed-by: Chen-Yu Tsai <wens@...e.org>
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