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Message-ID: <CAB7pii3kx75ajF=8TsU7mWrmrzoHLiy7uAb+PirGw04BH65bZg@mail.gmail.com>
Date: Fri, 16 Nov 2018 12:50:10 +0100
From: Martin Lund <martin.lund@...p-it-simple.com>
To: naga.sureshkumar.relli@...inx.com
Cc: boris.brezillon@...tlin.com, miquel.raynal@...tlin.com,
richard@....at, David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
Marek VaĊĦut <marek.vasut@...il.com>,
michals@...inx.com, naga sureshkumar <nagasuresh12@...il.com>,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
robh@...nel.org
Subject: Re: [LINUX PATCH v12 1/3] dt-bindings: mtd: arasan: Add device tree
binding documentation
Hi Naga,
I've been working on running up the latest kernel (v4.20-rc2) on our
custom Xilinx hw board so that I can test the v12 version of your
Arasan nand driver.
I've managed to get the driver successfully up and running and ready
for testing with a Micron MT29F64G08AFAAAWP device. However, setting
it up I've found a few inaccuracies in the documentation of the device
tree bindings.
This is the device configuration that ended up working for me with
linux v4.20-rc2:
nfc: nand@...00000 {
compatible = "xlnx,zynqmp-nand", "arasan,nfc-v3p10";
reg = <0x0 0xff100000 0x0 0x1000>;
clock-names = "clk_sys", "clk_flash";
clocks = <&clk200>, <&clk100>;
interrupt-parent = <&gic>;
interrupts = <0 14 4>;
#address-cells = <1>;
#size-cells = <0>;
nand@0 {
reg = <0>;
nand-ecc-mode = "hw";
};
};
Compared with the example you will notice that "clock-name" should be
"clock-names". reg was missing a "0x0".
I think it is helpful to provide a real-world working example, so you
might also consider changing the example "clocks" configuration to
clk200/clk100 since there is no clk_misc among the clock sources of
any of the xilinx zynqmp board device tree configurations.
Br, Martin
On Fri, Nov 9, 2018 at 6:00 AM Naga Sureshkumar Relli
<naga.sureshkumar.relli@...inx.com> wrote:
>
> This patch adds the dts binding document for arasan nand flash controller
>
> Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@...inx.com>
> ---
> Changes in v12:
> - Removed interrupt-parent description as it is implied as suggested by
> Rob Herring
> - Added missing ';' as required
> Changes in v11:
> - Updated compatible description as suggested by Boris
> - Removed arasan-has-dma property
> Changes in v10:
> - None
> Changes in v9:
> - None
> Changes in v8:
> - Updated compatible and clock-names as per Boris comments
> Changes in v7:
> - Corrected the acronyms those should be in caps
> Changes in v6:
> - Removed num-cs property
> - Separated nandchip from nand controller
> Changes in v5:
> - None
> Changes in v4:
> - Added num-cs property
> - Added clock support
> Changes in v3:
> - None
> Changes in v2:
> - None
> ---
> .../devicetree/bindings/mtd/arasan_nand.txt | 32 ++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/arasan_nand.txt
>
> diff --git a/Documentation/devicetree/bindings/mtd/arasan_nand.txt b/Documentation/devicetree/bindings/mtd/arasan_nand.txt
> new file mode 100644
> index 0000000..b522daf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/arasan_nand.txt
> @@ -0,0 +1,32 @@
> +Arasan NAND Flash Controller with ONFI 3.1 support
> +
> +Required properties:
> +- compatible: Should be "xlnx,zynqmp-nand", "arasan,nfc-v3p10"
> +- reg: Memory map for module access
> +- interrupts: Should contain the interrupt for the device
> +- clock-name: List of input clocks - "sys", "flash"
> + (See clock bindings for details)
> +- clocks: Clock phandles (see clock bindings for details)
> +
> +Required properties for child node:
> +- nand-ecc-mode: see nand.txt
> +
> +For NAND partition information please refer the below file
> +Documentation/devicetree/bindings/mtd/partition.txt
> +
> +Example:
> + nfc: nand@...00000 {
> + compatible = "xlnx,zynqmp-nand", "arasan,nfc-v3p10";
> + reg = <0x0 0xff100000 0x1000>;
> + clock-name = "sys", "flash";
> + clocks = <&misc_clk &misc_clk>;
> + interrupt-parent = <&gic>;
> + interrupts = <0 14 4>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + nand@0 {
> + reg = <0>;
> + nand-ecc-mode = "hw";
> + };
> + };
> --
> 2.7.4
>
>
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