linux-kernel - Re: omap5 fixing palmas IRQ_TYPE_NONE warning leads to gpadc timeouts

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20181119171406.GQ53235@atomide.com>
Date:   Mon, 19 Nov 2018 09:14:06 -0800
From:   Tony Lindgren <tony@...mide.com>
To:     Peter Ujfalusi <peter.ujfalusi@...com>
Cc:     Belisko Marek <marek.belisko@...il.com>,
        LKML <linux-kernel@...r.kernel.org>, linux-omap@...r.kernel.org,
        "Dr. H. Nikolaus Schaller" <hns@...delico.com>,
        Laxman Dewangan <ldewangan@...dia.com>,
        Jon Hunter <jonathanh@...dia.com>,
        Thierry Reding <treding@...dia.com>
Subject: Re: omap5 fixing palmas IRQ_TYPE_NONE warning leads to gpadc timeouts

Hi,

* Tony Lindgren <tony@...mide.com> [181119 16:19]:
> * Peter Ujfalusi <peter.ujfalusi@...com> [181119 10:16]:
> > On 2018-11-13 20:06, Tony Lindgren wrote:
> > > Looks like the IRQ_TYPE_NONE issue still is there for omap5 and
> > > should be fixed with IRQ_TYPE_HIGH.
> > > 
> > > No idea about why palmas interrupts would stop working though,
> > > Peter, do you have any ideas on this one?
> > 
> > No, I don't.
> > The INT polarity can be changed in Palmas.
> > based on the pdata->irq_flags (queried via irqd_get_trigger_type())
> > the code  configures it:
> > 
> > if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
> > 	reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
> > else
> > 	reg = 0;
> > 
> > and we pass the same irq_flags to the regmap_add_irq_chip()
> > IRQ_TYPE_LEVEL_HIGH == IRQF_TRIGGER_HIGH == 0x00000004
> > 
> > A change in DT should be enough, no need to patch palmas.c, imho.
> 
> But it's not. I'm now wondering if wakeupgen is inverting the
> polarity for this interrupt?
> 
> GIC docs say this about SPI interrupts:
> 
> "SPI is triggered on a rising edge or is active-HIGH level-sensitive."
> 
> So when setting IRQ_TYPE_LEVEL_HIGH in dts, we still must not
> invert the polarity in palmas while tegra needs to. So either
> tegra114 hardware is inverting the polarity, or omap5 wakeupgen
> is.
> 
> Does the palmas trm say which way PALMAS_POLARITY_CTRL
> triggers if PALMAS_POLARITY_CTRL_INT_POLARITY is set?
> 
> Also note that dra7 is using a gpio for palmas interrupt.

Well so commit 7e9d474954f4 ("ARM: tegra: Correct polarity for
Tegra114 PMIC interrupt") states that tegra114 inverts the
polarity of the PMIC interrupt. So adding Jon and Thierry to Cc.

So it seems that commit df545d1cd01a ("mfd: palmas: Provide
irq flags through DT/platform data") wrongly sets the
PALMAS_POLARITY_CTRL_INT_POLARITY on IRQ_TYPE_LEVEL_HIGH
while it should set it on IRQ_TYPE_LEVEL_LOW.

I think the fix needs to set the polarity using
of_machine_is_compatible() and probably also add a new
compatible to palmas.c for "ti,palmas-tegra114" to properly
deal with the inverted interrupt. Or add a property for
"interrupt-inverted". In any case, it seems that the
of_machine_is_compatible() is also needed too to avoid
breaking use with dtb files.

Jon & Thierry, can you guys please check and confirm this?

Regards,

Tony