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Message-Id: <20181119162622.810383751@linuxfoundation.org>
Date:   Mon, 19 Nov 2018 17:29:18 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Michael Kelley <mikelley@...rosoft.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "devel@...uxdriverproject.org" <devel@...uxdriverproject.org>,
        "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        "virtualization@...ts.linux-foundation.org" 
        <virtualization@...ts.linux-foundation.org>,
        "jgross@...e.com" <jgross@...e.com>,
        "akataria@...are.com" <akataria@...are.com>,
        "olaf@...fle.de" <olaf@...fle.de>,
        "apw@...onical.com" <apw@...onical.com>,
        vkuznets <vkuznets@...hat.com>,
        "jasowang@...hat.com" <jasowang@...hat.com>,
        "marcelo.cerri@...onical.com" <marcelo.cerri@...onical.com>,
        KY Srinivasan <kys@...rosoft.com>
Subject: [PATCH 4.9 52/83] clockevents/drivers/i8253: Add support for PIT shutdown quirk

4.9-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Michael Kelley <mikelley@...rosoft.com>

commit 35b69a420bfb56b7b74cb635ea903db05e357bec upstream.

Add support for platforms where pit_shutdown() doesn't work because of a
quirk in the PIT emulation. On these platforms setting the counter register
to zero causes the PIT to start running again, negating the shutdown.

Provide a global variable that controls whether the counter register is
zero'ed, which platform specific code can override.

Signed-off-by: Michael Kelley <mikelley@...rosoft.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>
Cc: "devel@...uxdriverproject.org" <devel@...uxdriverproject.org>
Cc: "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>
Cc: "virtualization@...ts.linux-foundation.org" <virtualization@...ts.linux-foundation.org>
Cc: "jgross@...e.com" <jgross@...e.com>
Cc: "akataria@...are.com" <akataria@...are.com>
Cc: "olaf@...fle.de" <olaf@...fle.de>
Cc: "apw@...onical.com" <apw@...onical.com>
Cc: vkuznets <vkuznets@...hat.com>
Cc: "jasowang@...hat.com" <jasowang@...hat.com>
Cc: "marcelo.cerri@...onical.com" <marcelo.cerri@...onical.com>
Cc: KY Srinivasan <kys@...rosoft.com>
Cc: stable@...r.kernel.org
Link: https://lkml.kernel.org/r/1541303219-11142-2-git-send-email-mikelley@microsoft.com
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 drivers/clocksource/i8253.c |   14 ++++++++++++--
 include/linux/i8253.h       |    1 +
 2 files changed, 13 insertions(+), 2 deletions(-)

--- a/drivers/clocksource/i8253.c
+++ b/drivers/clocksource/i8253.c
@@ -19,6 +19,13 @@
 DEFINE_RAW_SPINLOCK(i8253_lock);
 EXPORT_SYMBOL(i8253_lock);
 
+/*
+ * Handle PIT quirk in pit_shutdown() where zeroing the counter register
+ * restarts the PIT, negating the shutdown. On platforms with the quirk,
+ * platform specific code can set this to false.
+ */
+bool i8253_clear_counter_on_shutdown __ro_after_init = true;
+
 #ifdef CONFIG_CLKSRC_I8253
 /*
  * Since the PIT overflows every tick, its not very useful
@@ -108,8 +115,11 @@ static int pit_shutdown(struct clock_eve
 	raw_spin_lock(&i8253_lock);
 
 	outb_p(0x30, PIT_MODE);
-	outb_p(0, PIT_CH0);
-	outb_p(0, PIT_CH0);
+
+	if (i8253_clear_counter_on_shutdown) {
+		outb_p(0, PIT_CH0);
+		outb_p(0, PIT_CH0);
+	}
 
 	raw_spin_unlock(&i8253_lock);
 	return 0;
--- a/include/linux/i8253.h
+++ b/include/linux/i8253.h
@@ -21,6 +21,7 @@
 #define PIT_LATCH	((PIT_TICK_RATE + HZ/2) / HZ)
 
 extern raw_spinlock_t i8253_lock;
+extern bool i8253_clear_counter_on_shutdown;
 extern struct clock_event_device i8253_clockevent;
 extern void clockevent_i8253_init(bool oneshot);
 


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