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Date:   Mon, 19 Nov 2018 14:45:24 -0800
From:   Andy Lutomirski <luto@...nel.org>
To:     x86@...nel.org
Cc:     LKML <linux-kernel@...r.kernel.org>,
        Yu-cheng Yu <yu-cheng.yu@...el.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Borislav Petkov <bp@...en8.de>,
        Andy Lutomirski <luto@...nel.org>
Subject: [PATCH 00/13] x86/fault: #PF improvements, mostly related to USER bit

This series is a whole bunch of page fault cleanups, plus a couple
of OOPS diagnostic improvements.  The overall goals are to clean up
handling of the faulting CPL, the USER bit in the error_code, and
the log messages generated by #PF OOPSes.

This series can also be seen as CET preparation.  CET introduces the
WRUSS instruction, which is the very first way for CPL 0 code to
cause a #PF fault with the USER bit set.  Let's get the page fault
code into shape before we start using WRUSS :)

Andy Lutomirski (13):
  x86/fault: Check user_mode(regs) when avoiding an mmap_sem deadlock
  x86/fault: Check user_mode(regs) when validating a stack extension
  x86/cpufeatures, x86/fault: Mark SMAP as disabled when configured out
  x86/fault: Fold smap_violation() into do_user_addr_fault()
  x86/fault: Fix SMAP #PF handling buglet for implicit supervisor
    accesses
  x86/fault: Improve the condition for signalling vs OOPSing
  x86/fault: Make error_code sanitization more robust
  x86/fault: Don't set thread.cr2, etc before OOPSing
  x86/fault: Remove sw_error_code
  x86/fault: Don't try to recover from an implicit supervisor access
  x86/oops: Show the correct CS value in show_regs()
  x86/fault: Decode page fault OOPSes better
  x86/vsyscall/64: Use X86_PF constants in the simulated #PF error code

 arch/x86/entry/vsyscall/vsyscall_64.c    |   2 +-
 arch/x86/include/asm/disabled-features.h |   8 +-
 arch/x86/kernel/process_64.c             |   5 +-
 arch/x86/mm/fault.c                      | 224 ++++++++++++++---------
 4 files changed, 150 insertions(+), 89 deletions(-)

-- 
2.17.2

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