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Message-ID: <20181119161642.GA26595@localhost.localdomain>
Date: Mon, 19 Nov 2018 09:16:42 -0700
From: Keith Busch <keith.busch@...el.com>
To: Shunyong Yang <shunyong.yang@...-semitech.com>
Cc: bhelgaas@...gle.com, okaya@...nel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org,
Joey Zheng <yu.zheng@...-semitech.com>
Subject: Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed
errata
On Wed, Nov 07, 2018 at 03:25:05PM +0800, Shunyong Yang wrote:
> The HXT SD4800 PCI controller does not set the Command Completed
> bit unless writes to the Slot Command register change "Control"
> bits.
>
> This patch adds SD4800 to the quirk.
>
> Cc: Joey Zheng <yu.zheng@...-semitech.com>
> Signed-off-by: Shunyong Yang <shunyong.yang@...-semitech.com>
>
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..91db67963aea 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
> PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
> + PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
I guess you're just appending to where this quirk is already defined,
but why are the quirks even in the core driver instead of pci/quirks.c?
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