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Message-Id: <20181119162634.325603904@linuxfoundation.org>
Date:   Mon, 19 Nov 2018 17:28:12 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Michael Kelley <mikelley@...rosoft.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "devel@...uxdriverproject.org" <devel@...uxdriverproject.org>,
        "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        "virtualization@...ts.linux-foundation.org" 
        <virtualization@...ts.linux-foundation.org>,
        "jgross@...e.com" <jgross@...e.com>,
        "akataria@...are.com" <akataria@...are.com>,
        "olaf@...fle.de" <olaf@...fle.de>,
        "apw@...onical.com" <apw@...onical.com>,
        vkuznets <vkuznets@...hat.com>,
        "jasowang@...hat.com" <jasowang@...hat.com>,
        "marcelo.cerri@...onical.com" <marcelo.cerri@...onical.com>,
        KY Srinivasan <kys@...rosoft.com>
Subject: [PATCH 4.18 096/171] x86/hyper-v: Enable PIT shutdown quirk

4.18-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Michael Kelley <mikelley@...rosoft.com>

commit 1de72c706488b7be664a601cf3843bd01e327e58 upstream.

Hyper-V emulation of the PIT has a quirk such that the normal PIT shutdown
path doesn't work, because clearing the counter register restarts the
timer.

Disable the counter clearing on PIT shutdown.

Signed-off-by: Michael Kelley <mikelley@...rosoft.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>
Cc: "devel@...uxdriverproject.org" <devel@...uxdriverproject.org>
Cc: "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>
Cc: "virtualization@...ts.linux-foundation.org" <virtualization@...ts.linux-foundation.org>
Cc: "jgross@...e.com" <jgross@...e.com>
Cc: "akataria@...are.com" <akataria@...are.com>
Cc: "olaf@...fle.de" <olaf@...fle.de>
Cc: "apw@...onical.com" <apw@...onical.com>
Cc: vkuznets <vkuznets@...hat.com>
Cc: "jasowang@...hat.com" <jasowang@...hat.com>
Cc: "marcelo.cerri@...onical.com" <marcelo.cerri@...onical.com>
Cc: KY Srinivasan <kys@...rosoft.com>
Cc: stable@...r.kernel.org
Link: https://lkml.kernel.org/r/1541303219-11142-3-git-send-email-mikelley@microsoft.com
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 arch/x86/kernel/cpu/mshyperv.c |   11 +++++++++++
 1 file changed, 11 insertions(+)

--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -20,6 +20,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/kexec.h>
+#include <linux/i8253.h>
 #include <asm/processor.h>
 #include <asm/hypervisor.h>
 #include <asm/hyperv-tlfs.h>
@@ -285,6 +286,16 @@ static void __init ms_hyperv_init_platfo
 	if (efi_enabled(EFI_BOOT))
 		x86_platform.get_nmi_reason = hv_get_nmi_reason;
 
+	/*
+	 * Hyper-V VMs have a PIT emulation quirk such that zeroing the
+	 * counter register during PIT shutdown restarts the PIT. So it
+	 * continues to interrupt @18.2 HZ. Setting i8253_clear_counter
+	 * to false tells pit_shutdown() not to zero the counter so that
+	 * the PIT really is shutdown. Generation 2 VMs don't have a PIT,
+	 * and setting this value has no effect.
+	 */
+	i8253_clear_counter_on_shutdown = false;
+
 #if IS_ENABLED(CONFIG_HYPERV)
 	/*
 	 * Setup the hook to get control post apic initialization.


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