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Date:   Tue, 20 Nov 2018 13:19:28 -0800
From:   Stephane Eranian <eranian@...gle.com>
To:     Kyle Huey <me@...ehuey.com>
Cc:     Andi Kleen <ak@...ux.intel.com>,
        "Liang, Kan" <kan.liang@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...nel.org>, robert@...llahan.org,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Arnaldo Carvalho de Melo <acme@...hat.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Vince Weaver <vincent.weaver@...ne.edu>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [REGRESSION] x86, perf: counter freezing breaks rr

On Tue, Nov 20, 2018 at 12:53 PM Kyle Huey <me@...ehuey.com> wrote:
>
> On Tue, Nov 20, 2018 at 12:11 PM Andi Kleen <ak@...ux.intel.com> wrote:
> >
> > > > > Given that we're already at rc3, and that this renders rr unusable,
> > > > > we'd ask that counter freezing be disabled for the 4.20 release.
> > > >
> > > > The boot option should be good enough for the release?
> > >
> > > I'm not entirely sure what you mean here. We want you to flip the
> > > default boot option so this feature is off for this release. i.e. rr
> > > should work by default on 4.20 and people should have to opt into the
> > > inaccurate behavior if they want faster PMI servicing.
> >
> > I don't think it's inaccurate, it's just different
> > than what you are used to.
> >
> > For profiling including the kernel it's actually far more accurate
> > because the count is stopped much earlier near the sampling
> > point. Otherwise there is a considerable over count into
> > the PMI handler.
> >
> > In your case you limit the count to ring 3 so it's always cut off
> > at the transition point into the kernel, while with freezing
> > it's at the overflow point.
>
> I suppose that's fair that it's better for some use cases. The flip
> side is that it's no longer possible to get exactly accurate counts
> from user space if you're using the PMI (because any events between
> the overflow itself and the transition to the PMI handler are
> permanently lost) which is catastrophically bad for us :)
>
Let me make sure I got this right. During recording, you count on
retired-cond-branch
and you record the value of the PMU counter at specific locations,
e.g., syscalls.
During replay, you program the branch-conditional-retired to overflow
on interrupt at
each recorded values. So if you sampled the event at 1,000,000 and
then at 1,500,000.
Then you program the event with a period of 1,000,000 first, on
overflow the counter interrupts
and you get a signal. Then, you reprogram the event for a new period
of 500,000.  During recording
and replay the event is limited to ring 3 (user level). Am I
understanding this right?

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