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Message-ID: <HE1PR0401MB22353443B478CFD95466B664E8D90@HE1PR0401MB2235.eurprd04.prod.outlook.com>
Date: Tue, 20 Nov 2018 11:24:53 +0000
From: "M.h. Lian" <minghuan.lian@....com>
To: "Z.q. Hou" <zhiqiang.hou@....com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"l.subrahmanya@...iveil.co.in" <l.subrahmanya@...iveil.co.in>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
Leo Li <leoyang.li@....com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"will.deacon@....com" <will.deacon@....com>
CC: Mingkai Hu <mingkai.hu@....com>, Xiaowei Bao <xiaowei.bao@....com>
Subject: RE: [PATCHv2 14/25] PCI: mobiveil: initialize
Primary/Secondary/Subordinate bus number
reviewed-by: Minghuan Lian <Minghuan.Lian@....com>
> -----Original Message-----
> From: Z.q. Hou
> Sent: Tuesday, November 20, 2018 5:27 PM
> To: linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> bhelgaas@...gle.com; robh+dt@...nel.org; mark.rutland@....com;
> l.subrahmanya@...iveil.co.in; shawnguo@...nel.org; Leo Li
> <leoyang.li@....com>; lorenzo.pieralisi@....com;
> catalin.marinas@....com; will.deacon@....com
> Cc: Mingkai Hu <mingkai.hu@....com>; M.h. Lian
> <minghuan.lian@....com>; Xiaowei Bao <xiaowei.bao@....com>; Z.q. Hou
> <zhiqiang.hou@....com>
> Subject: [PATCHv2 14/25] PCI: mobiveil: initialize
> Primary/Secondary/Subordinate bus number
>
> From: Hou Zhiqiang <Zhiqiang.Hou@....com>
>
> The reset value is all zero, so set a workable value for Primary, Secondary
> and Subordinate bus numbers.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> ---
> V2:
> - no change
>
> drivers/pci/controller/pcie-mobiveil.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/pci/controller/pcie-mobiveil.c
> b/drivers/pci/controller/pcie-mobiveil.c
> index db7ecb021c63..9210165fe8c0 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -582,6 +582,12 @@ static int mobiveil_host_init(struct mobiveil_pcie
> *pcie)
> u32 value, pab_ctrl, type;
> struct resource_entry *win;
>
> + /* setup bus numbers */
> + value = csr_readl(pcie, PCI_PRIMARY_BUS);
> + value &= 0xff000000;
> + value |= 0x00ff0100;
> + csr_writel(pcie, value, PCI_PRIMARY_BUS);
> +
> /*
> * program Bus Master Enable Bit in Command Register in PAB Config
> * Space
> --
> 2.17.1
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