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Message-ID: <alpine.DEB.2.21.1811212136001.1665@nanos.tec.linutronix.de>
Date:   Wed, 21 Nov 2018 21:36:47 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Borislav Petkov <bp@...en8.de>
cc:     LKML <linux-kernel@...r.kernel.org>, x86@...nel.org,
        Peter Zijlstra <peterz@...radead.org>,
        Andy Lutomirski <luto@...nel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Jiri Kosina <jkosina@...e.cz>,
        Tom Lendacky <thomas.lendacky@....com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Andrea Arcangeli <aarcange@...hat.com>,
        David Woodhouse <dwmw@...zon.co.uk>,
        Andi Kleen <ak@...ux.intel.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Casey Schaufler <casey.schaufler@...el.com>,
        Asit Mallick <asit.k.mallick@...el.com>,
        Arjan van de Ven <arjan@...ux.intel.com>,
        Jon Masters <jcm@...hat.com>,
        Waiman Long <longman9394@...il.com>,
        Greg KH <gregkh@...uxfoundation.org>,
        Dave Stewart <david.c.stewart@...el.com>,
        Kees Cook <keescook@...omium.org>,
        Tim Chen <tim.c.chen@...ux.intel.com>
Subject: Re: [patch 05/24] x86/speculation: Disable STIBP when enhanced IBRS
 is in use

On Wed, 21 Nov 2018, Borislav Petkov wrote:
> On Wed, Nov 21, 2018 at 09:14:35PM +0100, Thomas Gleixner wrote:
> > From: Tim Chen <tim.c.chen@...ux.intel.com>
> > 
> > If enhanced IBRS is active, STIBP is redundant for mitigating Spectre v2
> > user space exploits from hyperthread sibling.
> > 
> > Disable STIBP when enhanced IBRS is used.
> > 
> > Signed-off-by: Tim Chen <tim.c.chen@...ux.intel.com>
> > Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> > 
> > ---
> >  arch/x86/kernel/cpu/bugs.c |    7 +++++++
> >  1 file changed, 7 insertions(+)
> > 
> > --- a/arch/x86/kernel/cpu/bugs.c
> > +++ b/arch/x86/kernel/cpu/bugs.c
> > @@ -321,6 +321,10 @@ static bool stibp_needed(void)
> >  	if (spectre_v2_enabled == SPECTRE_V2_NONE)
> >  		return false;
> >  
> > +	/* Enhanced IBRS makes using STIBP unnecessary. */
> > +	if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED)
> > +		return false;
> > +
> >  	if (!boot_cpu_has(X86_FEATURE_STIBP))
> >  		return false;
> >  
> > @@ -846,6 +850,9 @@ static ssize_t l1tf_show_state(char *buf
> >  
> >  static char *stibp_state(void)
> >  {
> > +	if (spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED)
> > +		return "";
> 
> If
> 	spectre_v2_enabled == SPECTRE_V2_IBRS_ENHANCED
> 
> then SPEC_CTRL_STIBP should not be set in x86_spec_ctrl_base
> (stibp_needed() prevents the setting in arch_smt_update()) so the above
> check should not be needed.
> 
> I *think*.

Yes, makes sense.

Thanks,

	tglx

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