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Message-ID: <20181121141725.GA24537@e107981-ln.cambridge.arm.com>
Date: Wed, 21 Nov 2018 14:17:25 +0000
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Leonard Crestez <leonard.crestez@....com>
Cc: "stefan@...er.ch" <stefan@...er.ch>,
Trent Piepho <tpiepho@...inj.com>,
Richard Zhu <hongxing.zhu@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"jingoohan1@...il.com" <jingoohan1@...il.com>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>
Subject: Re: [PATCH v3 2/2] PCI: imx6: limit DBI register length
On Wed, Nov 21, 2018 at 01:47:05PM +0000, Leonard Crestez wrote:
> On 11/20/2018 11:28 PM, Trent Piepho wrote:
> > On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
> >> On 20.11.2018 20:13, Trent Piepho wrote:
>
> >>> It also seems to me that this doesn't need to be in the internal pci
> >>> config access functions. The driver shouldn't be reading registers
> >>> that don't exist anyway. It's really about trying to fix sysfs access
> >>> to registers that don't exist. So maybe it should be done there.
> >>
> >> That was my first approach, see:
> >
> > Yes, but that just used the pci device id which applies to every IMX
> > design.
> >
> > It's also not totally correct, as it seems real registers after 0x200
> > do work on imx6, and that would prevent access to them.
>
> I see that Lorenzo already accepted the patch in pci/dwc:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/commit/?h=pci/dwc&id=f14eaec153aaebbe940ddd21e4198cc2abc927c2
>
> My tests show that this series breaks pci cards on 6qdl and I think it
> should be reverted until a fix is found. Are you OK with this?
I will drop the patches from the PCI queue.
Lorenzo
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