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Message-Id: <20181121000648.29262-1-ilina@codeaurora.org>
Date:   Tue, 20 Nov 2018 17:06:45 -0700
From:   Lina Iyer <ilina@...eaurora.org>
To:     sboyd@...nel.org, evgreen@...omium.org, marc.zyngier@....com
Cc:     linux-kernel@...r.kernel.org, rplsssn@...eaurora.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        thierry.reding@...il.com, Lina Iyer <ilina@...eaurora.org>
Subject: [RFC v3 0/3] qcom: GPIO IRQ wakeup using PDC irqchip

Hi,

This is an attempt at using GPIO as wake up sources. Based on discussions with
Stephen and Marc [1], the idea that is used here is to make PDC interrupt
controller the parent of TLMM irqchip. Wakeup capable GPIO IRQs have
corresponding parent interrupt in PDC and therefore the GIC. The TLMM irqchip
has a summary line into the GIC for all regular non-wakeup interrupt. 

This idea uses Thierry's hierarchical GPIO [2] and is dependent on [3]. Also
PDC device bindings published in [4] is needed.

Kindly review the series.

Thanks,
Lina

[1]. https://lore.kernel.org/patchwork/patch/998238/
[2]. https://lkml.org/lkml/2018/9/21/471
[3]. https://lkml.org/lkml/2018/9/21/474
[4]. https://lore.kernel.org/patchwork/patch/1008046/


Lina Iyer (3):
  drivers: pinctrl: msm: setup gpio irqchip in hierarchy with pdc
    irqchip
  dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO
  arm64: dts: msm: add PDC wake irq maps for GPIOs for SDM845

 .../bindings/pinctrl/qcom,sdm845-pinctrl.txt  |  31 ++++-
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  18 +++
 drivers/pinctrl/qcom/pinctrl-msm.c            | 125 +++++++++++++++++-
 3 files changed, 169 insertions(+), 5 deletions(-)

-- 
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