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Message-ID: <c62acf67-2529-15b1-5325-e0265b0f613d@linux.intel.com>
Date: Wed, 21 Nov 2018 09:39:00 +0800
From: "Li, Aubrey" <aubrey.li@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>,
Aubrey Li <aubrey.li@...el.com>
Cc: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
ak@...ux.intel.com, tim.c.chen@...ux.intel.com,
dave.hansen@...el.com, arjan@...ux.intel.com,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/2] proc: add /proc/<pid>/arch_state
On 2018/11/20 1:39, Peter Zijlstra wrote:
> On Thu, Nov 15, 2018 at 07:00:07AM +0800, Aubrey Li wrote:
>> Add a /proc/<pid>/arch_state interface to expose per-task cpu specific
>> state values.
>>
>> Exposing AVX-512 Hi16_ZMM registers usage is for the user space job
>> scheduler to cluster AVX-512 using tasks together, because these tasks
>> could cause core turbo frequency drop.
>
> I still don't much like the name; how about arch_simd_state ?
My intention is
#cat /proc/<pid>/arch_state
0 1 0
Here, the first "0" denotes simd_state, and the second "1" denotes another
cpu specific feature(may come soon), and can be extended.
But sure I can limit it to simd_state and change the name in the patch.
>Also,
> since we're printing an integer, I still prefer we go print the turbo
> license level. I know level 1 isn't too interesting atm, but consider
> future hardware widening the thing again and us growing level 3 or
> something.
The problem is, FWICT, the bits in XSAVE buffer is not exactly mapped to
the turbo license level, so we can't print turbo license level correctly,
or the first patch need rework for that.
>
> Also; you were going to shop around with the other architectures to see
> what they want/need for this interface. I see nothing on that.
>
I'm open for your suggestion, :)
Thanks,
-Aubrey
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