[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <tip-9f72f855a6cdbb5313787145a69b474cd9f55f28@git.kernel.org>
Date: Thu, 22 Nov 2018 13:50:32 -0800
From: tip-bot for Sherry Hurwitz <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: linux-doc@...r.kernel.org, fenghua.yu@...el.com, jroedel@...e.de,
puwen@...on.cn, corbet@....net, akpm@...ux-foundation.org,
pombredanne@...b.com, davem@...emloft.net, xiaochen.shen@...el.com,
tglx@...utronix.de, suravee.suthikulpanit@....com, hpa@...or.com,
luto@...nel.org, kstewart@...uxfoundation.org,
gregkh@...uxfoundation.org, rian@...m.mit.edu,
sherry.hurwitz@....com, mchehab+samsung@...nel.org,
peterz@...radead.org, linux-kernel@...r.kernel.org, arnd@...db.de,
babu.moger@....com, qianyue.zj@...baba-inc.com, jannh@...gle.com,
reinette.chatre@...el.com, Thomas.Lendacky@....com,
jpoimboe@...hat.com, dima@...sta.com, chang.seok.bae@...el.com,
dwmw2@...radead.org, tony.luck@...el.com, vkuznets@...hat.com,
mingo@...nel.org, brijesh.singh@....com, rafael@...nel.org,
bp@...e.de, pbonzini@...hat.com, kirill.shutemov@...ux.intel.com,
mingo@...hat.com
Subject: [tip:x86/cache] x86/resctrl: Add AMD's X86_FEATURE_MBA to the
scattered CPUID features
Commit-ID: 9f72f855a6cdbb5313787145a69b474cd9f55f28
Gitweb: https://git.kernel.org/tip/9f72f855a6cdbb5313787145a69b474cd9f55f28
Author: Sherry Hurwitz <sherry.hurwitz@....com>
AuthorDate: Wed, 21 Nov 2018 20:28:41 +0000
Committer: Borislav Petkov <bp@...e.de>
CommitDate: Thu, 22 Nov 2018 20:16:19 +0100
x86/resctrl: Add AMD's X86_FEATURE_MBA to the scattered CPUID features
The feature bit X86_FEATURE_MBA is detected via CPUID leaf 0x80000008
EBX Bit 06. This bit indicates the support of AMD's MBA feature.
This feature is supported by both Intel and AMD. But they are detected
in different CPUID leaves.
[ bp: s/cpuid/CPUID/g ]
Signed-off-by: Sherry Hurwitz <sherry.hurwitz@....com>
Signed-off-by: Babu Moger <babu.moger@....com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Reviewed-by: Borislav Petkov <bp@...e.de>
Cc: Andrew Morton <akpm@...ux-foundation.org>
Cc: Andy Lutomirski <luto@...nel.org>
Cc: Arnd Bergmann <arnd@...db.de>
Cc: Brijesh Singh <brijesh.singh@....com>
Cc: "Chang S. Bae" <chang.seok.bae@...el.com>
Cc: David Miller <davem@...emloft.net>
Cc: David Woodhouse <dwmw2@...radead.org>
Cc: Dmitry Safonov <dima@...sta.com>
Cc: Fenghua Yu <fenghua.yu@...el.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: "H. Peter Anvin" <hpa@...or.com>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: Jann Horn <jannh@...gle.com>
Cc: Joerg Roedel <jroedel@...e.de>
Cc: Jonathan Corbet <corbet@....net>
Cc: Josh Poimboeuf <jpoimboe@...hat.com>
Cc: Kate Stewart <kstewart@...uxfoundation.org>
Cc: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: <linux-doc@...r.kernel.org>
Cc: Mauro Carvalho Chehab <mchehab+samsung@...nel.org>
Cc: Paolo Bonzini <pbonzini@...hat.com>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Philippe Ombredanne <pombredanne@...b.com>
Cc: Pu Wen <puwen@...on.cn>
Cc: <qianyue.zj@...baba-inc.com>
Cc: "Rafael J. Wysocki" <rafael@...nel.org>
Cc: Reinette Chatre <reinette.chatre@...el.com>
Cc: Rian Hunter <rian@...m.mit.edu>
Cc: Sherry Hurwitz <sherry.hurwitz@....com>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Thomas Lendacky <Thomas.Lendacky@....com>
Cc: Tony Luck <tony.luck@...el.com>
Cc: Vitaly Kuznetsov <vkuznets@...hat.com>
Cc: <xiaochen.shen@...el.com>
Link: https://lkml.kernel.org/r/20181121202811.4492-10-babu.moger@amd.com
---
arch/x86/kernel/cpu/scattered.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 772c219b6889..a4d74d616222 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -17,7 +17,11 @@ struct cpuid_bit {
u32 sub_leaf;
};
-/* Please keep the leaf sorted by cpuid_bit.level for faster search. */
+/*
+ * Please keep the leaf sorted by cpuid_bit.level for faster search.
+ * X86_FEATURE_MBA is supported by both Intel and AMD. But the CPUID
+ * levels are different and there is a separate entry for each.
+ */
static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 },
{ X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 },
@@ -29,6 +33,7 @@ static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
{ X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
{ X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },
+ { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 },
{ X86_FEATURE_SME, CPUID_EAX, 0, 0x8000001f, 0 },
{ X86_FEATURE_SEV, CPUID_EAX, 1, 0x8000001f, 0 },
{ 0, 0, 0, 0, 0 }
Powered by blists - more mailing lists