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Message-ID: <CAFp+6iELH7Mw3Ue2ksEyV+Ac8hG8--Ki69xrPCA4F-AcireRow@mail.gmail.com>
Date: Fri, 23 Nov 2018 14:43:06 +0530
From: Vivek Gautam <vivek.gautam@...eaurora.org>
To: Will Deacon <will.deacon@....com>, "robh+dt" <robh+dt@...nel.org>
Cc: thor.thayer@...ux.intel.com, Mark Rutland <mark.rutland@....com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, alex.williamson@...hat.com,
Linux PM <linux-pm@...r.kernel.org>, sboyd@...nel.org,
freedreno <freedreno@...ts.freedesktop.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
open list <linux-kernel@...r.kernel.org>,
"list@....net:IOMMU DRIVERS <iommu@...ts.linux-foundation.org>, Joerg
Roedel <joro@...tes.org>," <iommu@...ts.linux-foundation.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Robin Murphy <robin.murphy@....com>,
Tomasz Figa <tfiga@...omium.org>,
Jordan Crouse <jcrouse@...eaurora.org>
Subject: Re: [RESEND PATCH v17 5/5] iommu/arm-smmu: Add support for
qcom,smmu-v2 variant
Hi Will,
On Wed, Nov 21, 2018 at 11:09 PM Will Deacon <will.deacon@....com> wrote:
>
> [+Thor]
>
> On Fri, Nov 16, 2018 at 04:54:30PM +0530, Vivek Gautam wrote:
> > qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
> > clock and power requirements.
> > On msm8996, multiple cores, viz. mdss, video, etc. use this
> > smmu. On sdm845, this smmu is used with gpu.
> > Add bindings for the same.
> >
> > Signed-off-by: Vivek Gautam <vivek.gautam@...eaurora.org>
> > Reviewed-by: Rob Herring <robh@...nel.org>
> > Reviewed-by: Tomasz Figa <tfiga@...omium.org>
> > Tested-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> > Reviewed-by: Robin Murphy <robin.murphy@....com>
> > ---
> > drivers/iommu/arm-smmu.c | 13 +++++++++++++
> > 1 file changed, 13 insertions(+)
> >
> > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> > index 2098c3141f5f..d315ca637097 100644
> > --- a/drivers/iommu/arm-smmu.c
> > +++ b/drivers/iommu/arm-smmu.c
> > @@ -120,6 +120,7 @@ enum arm_smmu_implementation {
> > GENERIC_SMMU,
> > ARM_MMU500,
> > CAVIUM_SMMUV2,
> > + QCOM_SMMUV2,
> > };
> >
> > struct arm_smmu_s2cr {
> > @@ -2026,6 +2027,17 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU);
> > ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500);
> > ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2);
> >
> > +static const char * const qcom_smmuv2_clks[] = {
> > + "bus", "iface",
> > +};
> > +
> > +static const struct arm_smmu_match_data qcom_smmuv2 = {
> > + .version = ARM_SMMU_V2,
> > + .model = QCOM_SMMUV2,
> > + .clks = qcom_smmuv2_clks,
> > + .num_clks = ARRAY_SIZE(qcom_smmuv2_clks),
> > +};
>
> These seems redundant if we go down the route proposed by Thor, where we
> just pull all of the clocks out of the device-tree. In which case, why
> do we need this match_data at all?
Which is better? Driver relying solely on the device tree to tell
which all clocks
are required to be enabled,
or, the driver deciding itself based on the platform's match data,
that it should
have X, Y, & Z clocks that should be supplied from the device tree.
Thanks
Vivek
>
> Will
> _______________________________________________
> iommu mailing list
> iommu@...ts.linux-foundation.org
> https://lists.linuxfoundation.org/mailman/listinfo/iommu
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