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Message-ID: <20181126101712.18480f3c@canb.auug.org.au>
Date: Mon, 26 Nov 2018 10:17:12 +1100
From: Stephen Rothwell <sfr@...b.auug.org.au>
To: Ralf Baechle <ralf@...ux-mips.org>,
James Hogan <james.hogan@...tec.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>
Cc: Linux Next Mailing List <linux-next@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Christoph Hellwig <hch@....de>,
Maksym Kokhan <maksym.kokhan@...ballogic.com>,
Paul Burton <paul.burton@...s.com>,
Andrii Bordunov <andrew.bordunov@...il.com>
Subject: linux-next: manual merge of the mips tree with the kbuild tree
Hi all,
Today's linux-next merge of the mips tree got a conflict in:
arch/mips/Kconfig
between commit:
eb01d42a7778 ("PCI: consolidate PCI config entry in drivers/pci")
from the kbuild tree and commit:
47bf2b031754 ("mips: sort list of configs for Malta")
from the mips tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc arch/mips/Kconfig
index f4df8007fddb,e49b5a0c8585..000000000000
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@@ -495,22 -498,23 +499,23 @@@ config MIPS_MALT
select BOOT_RAW
select BUILTIN_DTB
select CEVT_R4K
- select CSRC_R4K
select CLKSRC_MIPS_GIC
select COMMON_CLK
+ select CSRC_R4K
select DMA_MAYBE_COHERENT
select GENERIC_ISA_DMA
- select HAVE_PCSPKR_PLATFORM
- select IRQ_MIPS_CPU
- select MIPS_GIC
+ select HAVE_PCI
+ select HAVE_PCSPKR_PLATFORM
- select HW_HAS_PCI
select I8253
select I8259
+ select IRQ_MIPS_CPU
+ select LIBFDT
select MIPS_BONITO64
select MIPS_CPU_SCACHE
+ select MIPS_GIC
select MIPS_L1_CACHE_SHIFT_6
- select PCI_GT64XXX_PCI0
select MIPS_MSC
+ select PCI_GT64XXX_PCI0
select SMP_UP if SMP
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
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