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Message-ID: <CAHQ1cqG0oVWQw9NC_22f7bZMfX11wwuvO2_x8P3GJYsb-ecGvQ@mail.gmail.com>
Date: Mon, 26 Nov 2018 10:32:12 -0800
From: Andrey Smirnov <andrew.smirnov@...il.com>
To: Trent Piepho <tpiepho@...inj.com>
Cc: linux-kernel <linux-kernel@...r.kernel.org>, linux-imx@....com,
Richard Zhu <hongxing.zhu@....com>,
Chris Healy <cphealy@...il.com>,
Dong Aisheng <aisheng.dong@....com>,
Fabio Estevam <fabio.estevam@....com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lucas Stach <l.stach@...gutronix.de>,
Leonard Crestez <leonard.crestez@....com>,
linux-pci@...r.kernel.org
Subject: Re: [PATCH 2/3] PCI: imx: No-op imx6_pcie_reset_phy() on i.MX7D
On Mon, Nov 19, 2018 at 5:22 PM Trent Piepho <tpiepho@...inj.com> wrote:
>
> On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote:
> > PCIE PHY IP block on i.MX7D differs from the one used on i.MX6 family,
> > so none of the code in current implementation of imx6_pcie_reset_phy()
> > is applicable.
>
> Tested on IMX7d, still appears to work.
>
Thanks for testing! Unless you object, I'll add your Tested-by tag to
this patch.
> Note that your patches will collide with Stefan Agner's patch, "PCI:
> imx6: limit DBI register length", which was recently posted.
>
> He changed the way the variants are handled. That method would allow
> some of the IMX7D || IMX8MQ checks to be re-written as
>
> imx6_pcie->drvdata->boolean_attribute
>
> Where the attribute can be set in a table and be re-used in every place
> it comes into play and updated for new devices in one spot, instead of
> keeping piles of this version or that version or this other version
> checks up to date.
Thanks for the heads up! I am expecting that I'd have to re-base this
series on "next" in PCI tree before it can be applied. This should
provide for a good opportunity to discover and resolve all of the
conflicts, I think.
Thanks,
Andrey Smirnov
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