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Message-ID: <20181126093051.GV2131@hirez.programming.kicks-ass.net>
Date: Mon, 26 Nov 2018 10:30:51 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Andrea Parri <andrea.parri@...rulasolutions.com>
Cc: Ingo Molnar <mingo@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
linux-kernel@...r.kernel.org
Subject: Re: [Question] atomic_fetch_andnot() in nohz_idle_balance()
On Wed, Nov 21, 2018 at 11:34:53PM +0100, Andrea Parri wrote:
> Hi,
>
> The comment for the atomic_fetch_andnot() in nohz_idle_balance() says:
>
> "barrier, pairs with nohz_balance_enter_idle(), ensures ..."
>
> which, well, does sound a note of warning... ;-)
>
> I see that nohz_balance_enter_idle() has an smp_mb__after_atomic() but
> the comment for the latter suggests that this barrier is pairing with
> the smp_mb() in _nohz_idle_balance().
>
> So, what is the intended pairing barrier for the atomic_fetch_andnot()?
> what (which memory accesses) do you want "to order" here?
I can't seem to make sense of that comment either; the best I can come
up with is that it would order the prior NOHZ_KICK_MASK load vs us then
changing it.
But that would order against kick_ilb(), not enter_idle.
Vincent?
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