linux-kernel - Re: [PATCH V3 2/2] base/drivers/arch_topology: Default dmips-mhz if they are not set in DT

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Message-ID: <44e471b6-d58c-310a-0883-bf9f444ddcce@linaro.org>
Date:   Mon, 26 Nov 2018 12:36:31 +0100
From:   Daniel Lezcano <daniel.lezcano@...aro.org>
To:     Quentin Perret <quentin.perret@...aro.org>,
        Viresh Kumar <viresh.kumar@...aro.org>
Cc:     rjw@...ysocki.net, linux-kernel@...r.kernel.org,
        Chris Redpath <chris.redpath@...aro.org>,
        Amit Kucheria <amit.kucheria@...aro.org>,
        Nicolas Dechesne <nicolas.dechesne@...aro.org>,
        Niklas Cassel <niklas.cassel@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "Rafael J. Wysocki" <rafael@...nel.org>
Subject: Re: [PATCH V3 2/2] base/drivers/arch_topology: Default dmips-mhz if
 they are not set in DT

On 26/11/2018 12:09, Quentin Perret wrote:
> On Monday 26 Nov 2018 at 15:49:55 (+0530), Viresh Kumar wrote:
>> On 26-11-18, 11:08, Daniel Lezcano wrote:
>>> On 26/11/2018 10:52, Quentin Perret wrote:
>>>> Maybe you want to test 'if (!raw_capacity || cap_parsing_failed)' at the
>>>> top of topology_parse_cpu_capacity() ?
>>>
>>> I prefer to update the documentation, it makes more sense than adding
>>> more cumbersome tests in the current code.
>>
>> +1
>>
>> Throwing an error and ignoring DT number completely for the capacity
>> are good enough in my opinion as well.
>>
>> And who cares for the platforms that can't even fill the DT properly :)
> 
> Right, I think we all agree the case with a partially filled DT is
> broken. I don't actually care too much about the behaviour in this case,
> but it needs to be consistent with the doc.
> 
> So, as long as you fix the doc, that change is fine by me :-)

Ok what about the following change ?

"

If capacity-dmips-mhz is not specified or if the parsing fails, the
default capacity value will be computed against the highest frequency,
it will result most of the time on the same capacity value. However on
some platform with different OPP set but the same micro-architecture,
the capacity will be scaled down for CPUs having lower frequencies.

"



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