lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <154330186815.88331.12720647562079303842@swboyd.mtv.corp.google.com>
Date:   Mon, 26 Nov 2018 22:57:48 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Andy Gross <andy.gross@...aro.org>,
        Doug Anderson <dianders@...omium.org>,
        Taniya Das <tdas@...eaurora.org>
Cc:     Michael Turquette <mturquette@...libre.com>,
        David Brown <david.brown@...aro.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        "open list:ARM/QUALCOMM SUPPORT" <linux-soc@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>, devicetree@...r.kernel.org,
        Rob Herring <robh@...nel.org>
Subject: Re: [PATCH] arm64: dts: sdm845: Add videocc node

Quoting Doug Anderson (2018-11-26 16:35:50)
> Hi,
> 
> On Mon, Nov 5, 2018 at 2:35 AM Taniya Das <tdas@...eaurora.org> wrote:
> >
> > This adds the video clock controller node to sdm845 based on the examples
> > in the bindings.
> >
> > Signed-off-by: Taniya Das <tdas@...eaurora.org>
> > ---
> >  arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > index b72bdb0..91a281b 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -8,6 +8,7 @@
> >  #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
> >  #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> >  #include <dt-bindings/clock/qcom,rpmh.h>
> > +#include <dt-bindings/clock/qcom,videocc-sdm845.h>
> >  #include <dt-bindings/interrupt-controller/arm-gic.h>
> >  #include <dt-bindings/phy/phy-qcom-qusb2.h>
> >  #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> > @@ -1256,6 +1257,13 @@
> >                         #power-domain-cells = <1>;
> >                 };
> >
> > +               videocc: clock-controller@...0000 {
> > +                       compatible = "qcom,sdm845-videocc";
> > +                       reg = <0xab00000 0x10000>;
> > +                       #clock-cells = <1>;
> > +                       #power-domain-cells = <1>;
> 
> Any reason not to include "#reset-cells = <1>;" here?  The bindings
> list it as optional but I see no reason why we should leave it off.
> The file "include/dt-bindings/clock/qcom,videocc-sdm845.h" seems to
> include some #defines for resets.  Even though the driver doesn't seem
> like it supports it yet, it still should be fine to list it here.

We should update the binding to make it a required property. It doesn't
make any sense why that property would be optional given that the
hardware either has support for resets or it doesn't.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ