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Message-ID: <154331006901.88331.9760589510991406736@swboyd.mtv.corp.google.com>
Date:   Tue, 27 Nov 2018 01:14:29 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Michael Turquette <mturquette@...libre.com>,
        Taniya Das <tdas@...eaurora.org>
Cc:     Andy Gross <andy.gross@...aro.org>,
        David Brown <david.brown@...aro.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, robh@...nel.org,
        Taniya Das <tdas@...eaurora.org>
Subject: Re: [PATCH v10 3/3] clk: qcom: Add lpass clock controller driver for SDM845

Quoting Taniya Das (2018-11-21 23:53:41)
> +
> +static struct clk_branch lpass_qdsp6ss_core_clk = {
> +       .halt_reg = 0x20,
> +       /* CLK_OFF would not toggle until LPASS is not out of reset */

Is this really "CLK_OFF won't toggle until LPASS it out of reset"?

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