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Message-ID: <d2583bdb-c63c-6d62-6b36-2f21d558bbbb@intel.com>
Date:   Tue, 27 Nov 2018 13:48:02 +0200
From:   Mathias Nyman <mathias.nyman@...el.com>
To:     Kai Heng Feng <kai.heng.feng@...onical.com>,
        "Singh, Sandeep" <sandeep.singh@....com>
Cc:     "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "S-k, Shyam-sundar" <Shyam-sundar.S-k@....com>,
        "Shah, Nehal-bakulchandra" <Nehal-bakulchandra.Shah@....com>
Subject: Re: [PATCH v3] xhci: workaround CSS timeout on AMD SNPS 3.0 xHC

On 27.11.2018 09:44, Kai Heng Feng wrote:
> 
> 
>> On Nov 24, 2018, at 00:24, Singh, Sandeep <sandeep.singh@....com> wrote:
>>
>> From: Sandeep Singh <sandeep.singh@....com>
>>
>> Occasionally AMD SNPS 3.0 xHC does not respond to
>> CSS when set, also it does not flag anything on SRE and HCE
>> to point the internal xHC errors on USBSTS register. This stalls
>> the entire system wide suspend and there is no point in stalling
>> just because of xHC CSS is not responding.
>>
>> To work around this problem, if the xHC does not flag
>> anything on SRE and HCE, we can skip the CSS
>> timeout and allow the system to continue the suspend. Once the
>> system resume happens we can internally reset the controller
>> using XHCI_RESET_ON_RESUME quirk
>>
>> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@....com>
>> Signed-off-by: Sandeep Singh <Sandeep.Singh@....com>
>> cc: Nehal Shah <Nehal-bakulchandra.Shah@....com>
> 
> Tested-by: Kai-Heng Feng <kai.heng.feng@...onical.com>

Thanks, applying

-Mathias

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