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Message-Id: <20181128223428.177313-3-evgreen@chromium.org>
Date: Wed, 28 Nov 2018 14:34:27 -0800
From: Evan Green <evgreen@...omium.org>
To: Andy Gross <andy.gross@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Douglas Anderson <dianders@...omium.org>,
Evan Green <evgreen@...omium.org>, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
David Brown <david.brown@...aro.org>,
Mark Rutland <mark.rutland@....com>, linux-soc@...r.kernel.org
Subject: [PATCH v1 2/3] arm64: dts: qcom: sdm845: Add SD nodes
Add the SD controller to SDM845.
Signed-off-by: Evan Green <evgreen@...omium.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 1419b0098cb38..bb8eacdf40910 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1078,6 +1078,21 @@
};
};
+ sdhc_2: sdhci@...4000 {
+ compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0x8804000 0x1000>;
+
+ interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>;
+ clock-names = "iface", "core";
+
+ status = "disabled";
+ };
+
usb_1_hsphy: phy@...2000 {
compatible = "qcom,sdm845-qusb2-phy";
reg = <0x88e2000 0x400>;
--
2.18.1
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