linux-kernel - [PATCH v4 10/20] DT: marvell,mmp2: Add SSP controllers

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Message-Id: <20181128175324.163202-11-lkundrak@v3.sk>
Date:   Wed, 28 Nov 2018 18:53:14 +0100
From:   Lubomir Rintel <lkundrak@...sk>
To:     arm@...nel.org, Olof Johansson <olof@...om.net>,
        Arnd Bergmann <arnd@...db.de>
Cc:     Eric Miao <eric.y.miao@...il.com>,
        Haojian Zhuang <haojian.zhuang@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Robert Jarzmik <robert.jarzmik@...e.fr>,
        Pavel Machek <pavel@....cz>, James Cameron <quozl@...top.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Lubomir Rintel <lkundrak@...sk>
Subject: [PATCH v4 10/20] DT: marvell,mmp2: Add SSP controllers

Despite Marvel keeps their base addresses secret there's a good chance
they're actually correct.

SSP1 and SSP3 bases were taken from OLPC 1.75: OpenFirmware and kernel
respectively. SSP2 and SSP4 addresses are from James Cameron who actually
has a copy of the data sheet.

Signed-off-by: Lubomir Rintel <lkundrak@...sk>
Acked-by: Pavel Machek <pavel@....cz>

---
Changes since v2:
- Added SSP2 and SSP4 (thanks James Cameron <quozl@...top.org>)

Changes since v1:
- Dropped the aliases

 arch/arm/boot/dts/mmp2.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 0c5a51b98c3f..ee03e0846740 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -346,6 +346,38 @@
 				resets = <&soc_clocks MMP2_CLK_RTC>;
 				status = "disabled";
 			};
+
+			ssp1: ssp@...35000 {
+				compatible = "marvell,mmp2-ssp";
+				reg = <0xd4035000 0x1000>;
+				clocks = <&soc_clocks MMP2_CLK_SSP0>;
+				interrupts = <0>;
+				status = "disabled";
+			};
+
+			ssp2: ssp@...36000 {
+				compatible = "marvell,mmp2-ssp";
+				reg = <0xd4036000 0x1000>;
+				clocks = <&soc_clocks MMP2_CLK_SSP1>;
+				interrupts = <1>;
+				status = "disabled";
+			};
+
+			ssp3: ssp@...37000 {
+				compatible = "marvell,mmp2-ssp";
+				reg = <0xd4037000 0x1000>;
+				clocks = <&soc_clocks MMP2_CLK_SSP2>;
+				interrupts = <20>;
+				status = "disabled";
+			};
+
+			ssp4: ssp@...39000 {
+				compatible = "marvell,mmp2-ssp";
+				reg = <0xd4039000 0x1000>;
+				clocks = <&soc_clocks MMP2_CLK_SSP3>;
+				interrupts = <21>;
+				status = "disabled";
+			};
 		};
 
 		soc_clocks: clocks{
-- 
2.19.1