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Message-ID: <5C00040F.4080507@hisilicon.com>
Date: Thu, 29 Nov 2018 15:21:51 +0000
From: Wei Xu <xuwei5@...ilicon.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
<mturquette@...libre.com>, <sboyd@...nel.org>, <robh+dt@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<amit.kucheria@...aro.org>, <linux-clk@...r.kernel.org>
Subject: Re: [PATCH 2/4] arm64: dts: hisilicon: Add clock nodes for Hi3670 SoC
Hi Manivannan,
On 2018/9/21 7:01, Manivannan Sadhasivam wrote:
> Add clock nodes for HiSilicon Hi3670 SoC.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Applied to the hisilicon soc dt tree.
Thanks!
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 43 +++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> index c90e6f6a34ec..8a0ee4b08886 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> @@ -7,6 +7,7 @@
> */
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/hi3670-clock.h>
>
> / {
> compatible = "hisilicon,hi3670";
> @@ -144,6 +145,48 @@
> #size-cells = <2>;
> ranges;
>
> + crg_ctrl: crg_ctrl@...35000 {
> + compatible = "hisilicon,hi3670-crgctrl", "syscon";
> + reg = <0x0 0xfff35000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + pctrl: pctrl@...09000 {
> + compatible = "hisilicon,hi3670-pctrl", "syscon";
> + reg = <0x0 0xe8a09000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + pmuctrl: crg_ctrl@...34000 {
> + compatible = "hisilicon,hi3670-pmuctrl", "syscon";
> + reg = <0x0 0xfff34000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + sctrl: sctrl@...0a000 {
> + compatible = "hisilicon,hi3670-sctrl", "syscon";
> + reg = <0x0 0xfff0a000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + iomcu: iomcu@...7e000 {
> + compatible = "hisilicon,hi3670-iomcu", "syscon";
> + reg = <0x0 0xffd7e000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + media1_crg: media1_crgctrl@...ff000 {
> + compatible = "hisilicon,hi3670-media1-crg", "syscon";
> + reg = <0x0 0xe87ff000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> + media2_crg: media2_crgctrl@...00000 {
> + compatible = "hisilicon,hi3670-media2-crg","syscon";
> + reg = <0x0 0xe8900000 0x0 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> uart6_clk: clk_19_2M {
> compatible = "fixed-clock";
> #clock-cells = <0>;
>
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