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Message-ID: <nycvar.YFH.7.76.1811291831560.21108@cbobk.fhfr.pm>
Date:   Thu, 29 Nov 2018 18:35:26 +0100 (CET)
From:   Jiri Kosina <jikos@...nel.org>
To:     Andy Lutomirski <luto@...capital.net>
cc:     Peter Zijlstra <peterz@...radead.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Andrew Lutomirski <luto@...nel.org>,
        the arch/x86 maintainers <x86@...nel.org>,
        Linux List Kernel Mailing <linux-kernel@...r.kernel.org>,
        Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        Steven Rostedt <rostedt@...dmis.org>,
        Ingo Molnar <mingo@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>, mhiramat@...nel.org,
        jbaron@...mai.com, David.Laight@...lab.com, bp@...en8.de,
        julia@...com, jeyu@...nel.org, Peter Anvin <hpa@...or.com>
Subject: Re: [PATCH v2 4/4] x86/static_call: Add inline static call implementation
 for x86-64

On Thu, 29 Nov 2018, Andy Lutomirski wrote:

> Does anyone know what the actual hardware semantics are?  The SDM is not 
> particularly informative unless I looked at the wrong section.

I don't think SDM answers all the questions there, unfortunately.

I vaguely remember that back then when I was preparing the original 
text_poke_bp() implementation, hpa had to provide some answers directly 
from inner depths of Intel ... see fd4363fff3 ("x86: Introduce int3 
(breakpoint)-based instruction patching") for reference.

-- 
Jiri Kosina
SUSE Labs

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