linux-kernel - [PATCH v1 3/4] arm64: dts: qcom: sdm845: Fix QMP PHY #clock-cells

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Message-Id: <20181129221357.67417-4-evgreen@chromium.org>
Date:   Thu, 29 Nov 2018 14:13:56 -0800
From:   Evan Green <evgreen@...omium.org>
To:     Kishon Vijay Abraham I <kishon@...com>,
        Rob Herring <robh+dt@...nel.org>,
        Andy Gross <andy.gross@...aro.org>
Cc:     Douglas Anderson <dianders@...omium.org>,
        Stephen Boyd <swboyd@...omium.org>,
        Evan Green <evgreen@...omium.org>, devicetree@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        David Brown <david.brown@...aro.org>,
        Mark Rutland <mark.rutland@....com>, linux-soc@...r.kernel.org
Subject: [PATCH v1 3/4] arm64: dts: qcom: sdm845: Fix QMP PHY #clock-cells

Move #clock-cells into the child node for instances of the qcom-qmp-phy
nodes, and set it to zero, in accordance with the proper bindings. PHYs
that don't provide clocks don't have #clock-cells, and so are left alone.

Signed-off-by: Evan Green <evgreen@...omium.org>
---

 arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 61a7cee153eae..4582db5e86350 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1178,7 +1178,6 @@
 			      <0x88e8000 0x10>;
 			reg-names = "reg-base", "dp_com";
 			status = "disabled";
-			#clock-cells = <1>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
@@ -1200,6 +1199,7 @@
 				      <0x88e9600 0x128>,
 				      <0x88e9800 0x200>,
 				      <0x88e9a00 0x100>;
+				#clock-cells = <0>;
 				#phy-cells = <0>;
 				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
 				clock-names = "pipe0";
@@ -1211,7 +1211,6 @@
 			compatible = "qcom,sdm845-qmp-usb3-uni-phy";
 			reg = <0x88eb000 0x18c>;
 			status = "disabled";
-			#clock-cells = <1>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
@@ -1231,6 +1230,7 @@
 				      <0x88eb400 0x1fc>,
 				      <0x88eb800 0x218>,
 				      <0x88e9600 0x70>;
+				#clock-cells = <0>;
 				#phy-cells = <0>;
 				clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
 				clock-names = "pipe0";
-- 
2.18.1