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Message-ID: <CALCETrUtaXU+5hTNrPKZgU_w1piyZ7O+5Kpk99RJMv9jry-OdQ@mail.gmail.com>
Date: Fri, 30 Nov 2018 12:59:36 -0800
From: Andy Lutomirski <luto@...nel.org>
To: Steven Rostedt <rostedt@...dmis.org>
Cc: Andrew Lutomirski <luto@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Peter Zijlstra <peterz@...radead.org>, X86 ML <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>,
Ard Biesheuvel <ard.biesheuvel@...aro.org>,
Ingo Molnar <mingo@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Masami Hiramatsu <mhiramat@...nel.org>,
Jason Baron <jbaron@...mai.com>, Jiri Kosina <jkosina@...e.cz>,
David Laight <David.Laight@...lab.com>,
Borislav Petkov <bp@...en8.de>, julia@...com, jeyu@...nel.org,
"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH v2 4/4] x86/static_call: Add inline static call
implementation for x86-64
On Fri, Nov 30, 2018 at 12:28 PM Steven Rostedt <rostedt@...dmis.org> wrote:
>
> On Fri, 30 Nov 2018 12:18:33 -0800
> Andy Lutomirski <luto@...nel.org> wrote:
>
> > Or we could replace that IPI with x86's bona fide serialize-all-cpus
> > primitive and then we can just retry instead of emulating. It's a
> > piece of cake -- we just trigger an SMI :) /me runs away.
>
> I must have fallen on my head one too many times, because I really like
> the idea of synchronizing all the CPUs with an SMI! (If that's even
> possible). The IPI's that are sent are only to force smp_mb() on all
> CPUs. Which should be something an SMI could do.
>
> /me runs after Andy
According to the SDM, you can program the APIC ICR to request an SMI.
It's not remotely clear to me what will happen if we do this. For all
I know, the SMI handler will explode and the computer will catch fire.
PeterZ?
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