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Message-ID: <154356053181.88331.12262289931983027816@swboyd.mtv.corp.google.com>
Date:   Thu, 29 Nov 2018 22:48:51 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     matthias.bgg@...il.com, matthias.bgg@...nel.org,
        mturquette@...libre.com
Cc:     jasu@...motys.info, sean.wang@...nel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2 3/3] clk: mediatek: Mark bus and DRAM related clocks as
 critical

Quoting matthias.bgg@...nel.org (2018-11-16 10:09:01)
> From: Jasper Mattsson <jasu@...motys.info>
> 
> This marks MUXes axi_sel and ddrphycfg_sel as well as gates
> infra_dramc_f26m and infra_dramc_b_f26m as with CLK_IS_CRITICAL.
> 
> Fixes: 96596aa06628 ("clk: mediatek: add clk support for MT6797")
> Signed-off-by: Jasper Mattsson <jasu@...motys.info>
> Signed-off-by: Matthias Brugger <matthias.bgg@...il.com>
> ---

Can you add comments in the commit text and in the code about why the
CLK_IS_CRITICAL flag is added to these clks? It makes it easier to
figure out why the flag is there months from now when we all forget

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