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Message-ID: <0691834a-e2bf-20bb-fa5c-081ee6668250@codeaurora.org>
Date: Fri, 30 Nov 2018 23:47:17 +0530
From: Taniya Das <tdas@...eaurora.org>
To: Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>
Cc: Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Rajendra Nayak <rnayak@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, robh@...nel.org
Subject: Re: [PATCH v10 3/3] clk: qcom: Add lpass clock controller driver for
SDM845
Hello Stephen,
On 11/27/2018 2:44 PM, Stephen Boyd wrote:
> Quoting Taniya Das (2018-11-21 23:53:41)
>> +
>> +static struct clk_branch lpass_qdsp6ss_core_clk = {
>> + .halt_reg = 0x20,
>> + /* CLK_OFF would not toggle until LPASS is not out of reset */
>
> Is this really "CLK_OFF won't toggle until LPASS it out of reset"?
>
Would take care of it, in the next series.
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