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Date:   Sun, 2 Dec 2018 20:47:18 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Houlong Wei <houlong.wei@...iatek.com>
Cc:     Jassi Brar <jassisinghbrar@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Daniel Kurtz <djkurtz@...omium.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
        Sascha Hauer <kernel@...gutronix.de>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Nicolas Boichat <drinkcat@...omium.org>,
        CK HU <ck.hu@...iatek.com>,
        Bibby Hsieh <bibby.hsieh@...iatek.com>,
        YT Shen <yt.shen@...iatek.com>,
        Daoyuan Huang <daoyuan.huang@...iatek.com>,
        Jiaguang Zhang <jiaguang.zhang@...iatek.com>,
        Dennis-YC Hsieh <dennis-yc.hsieh@...iatek.com>,
        Monica Wang <monica.wang@...iatek.com>,
        HS Liao <hs.liao@...iatek.com>, ginny.chen@...iatek.com,
        enzhu.wang@...iatek.com, kendrick.hsu@...iatek.com
Subject: Re: [PATCH v27 1/2] arm64: dts: mt8173: Add GCE node



On 29/11/2018 04:37, Houlong Wei wrote:
> This patch adds the device node of the GCE hardware for CMDQ module.
> 
> Signed-off-by: Houlong Wei <houlong.wei@...iatek.com>
> Signed-off-by: HS Liao <hs.liao@...iatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi |   10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index abd2f15..412ffd4 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi

Applied to v4.20-next/dts64

Thanks a lot, it was a long journey :)

> @@ -18,6 +18,7 @@
>  #include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/power/mt8173-power.h>
>  #include <dt-bindings/reset/mt8173-resets.h>
> +#include <dt-bindings/gce/mt8173-gce.h>
>  #include "mt8173-pinfunc.h"
>  
>  / {
> @@ -521,6 +522,15 @@
>  			status = "disabled";
>  		};
>  
> +		gce: mailbox@...12000 {
> +			compatible = "mediatek,mt8173-gce";
> +			reg = <0 0x10212000 0 0x1000>;
> +			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
> +			clocks = <&infracfg CLK_INFRA_GCE>;
> +			clock-names = "gce";
> +			#mbox-cells = <3>;
> +		};
> +
>  		mipi_tx0: mipi-dphy@...15000 {
>  			compatible = "mediatek,mt8173-mipi-tx";
>  			reg = <0 0x10215000 0 0x1000>;
> 

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