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Message-Id: <1543870651-16669-1-git-send-email-atish.patra@wdc.com>
Date: Mon, 3 Dec 2018 12:57:27 -0800
From: Atish Patra <atish.patra@....com>
To: linux-kernel@...r.kernel.org
Cc: Atish Patra <atish.patra@....com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
devicetree@...r.kernel.org,
Dmitriy Cherkasov <dmitriy@...-tech.org>,
linux-riscv@...ts.infradead.org,
Mark Rutland <mark.rutland@....com>,
Palmer Dabbelt <palmer@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Anup Patel <anup@...infault.org>,
Damien Le Moal <Damien.LeMoal@....com>
Subject: [PATCH 0/4] Timer code cleanup.
This patch series provides an assorted timer cleanups in RISC-V.
Atish Patra (3):
RISC-V: Support per-hart timebase-frequency
RISC-V: Remove per cpu clocksource
RISC-V: Fix non-smp kernel boot on SMP systems
Palmer Dabbelt (1):
dt-bindings: Correct RISC-V's timebase-frequency
Documentation/devicetree/bindings/riscv/cpus.txt | 4 ++-
arch/riscv/kernel/time.c | 9 +-----
drivers/clocksource/riscv_timer.c | 39 ++++++++++++++++++++----
3 files changed, 37 insertions(+), 15 deletions(-)
--
2.7.4
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