[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20181203221032.GA20602@jcrouse-lnx.qualcomm.com>
Date: Mon, 3 Dec 2018 15:10:33 -0700
From: Jordan Crouse <jcrouse@...eaurora.org>
To: Jonathan Marek <jonathan@...ek.ca>
Cc: freedreno@...ts.freedesktop.org,
Mark Rutland <mark.rutland@....com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, festevam@...il.com,
Sascha Hauer <s.hauer@...gutronix.de>,
open list <linux-kernel@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>, Chris.Healy@....aero,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <fabio.estevam@....com>,
Shawn Guo <shawnguo@...nel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
NXP Linux Team <linux-imx@....com>
Subject: Re: [Freedreno] [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes
On Mon, Dec 03, 2018 at 04:18:16PM -0500, Jonathan Marek wrote:
> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
> ---
> arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++
> arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++
> 2 files changed, 34 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
> index 67d462715..e9a7bbce9 100644
> --- a/arch/arm/boot/dts/imx51.dtsi
> +++ b/arch/arm/boot/dts/imx51.dtsi
> @@ -628,5 +628,22 @@
> clock-names = "ipg", "ahb";
> };
> };
> +
> + gpu: gpu@...00000 {
> + compatible = "amd,imageon-200.1", "amd,imageon";
> + reg = <0x30000000 0x20000>;
> + reg-names = "kgsl_3d0_reg_memory";
> + interrupts = <12>;
> + interrupt-names = "kgsl_3d0_irq";
> + clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
> + clock-names = "core_clk", "mem_iface_clk";
> +
> + qcom,gpu-pwrlevels {
> + compatible = "qcom,gpu-pwrlevels";
> + qcom,gpu-pwrlevel@0 {
> + qcom,gpu-freq = <166250000>;
> + };
> + };
There shouldn't be any incremental cost in the source code to use OPP; it should
just work. And then this won't give us a further reason to keep the legacy
code around when we decide to dump any pretense of downstream "compatibility".
> + };
> };
> };
> diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
> index 207eb557c..586d45586 100644
> --- a/arch/arm/boot/dts/imx53.dtsi
> +++ b/arch/arm/boot/dts/imx53.dtsi
> @@ -838,5 +838,22 @@
> reg = <0xf8000000 0x20000>;
> clocks = <&clks IMX5_CLK_OCRAM>;
> };
> +
> + gpu: gpu@...00000 {
> + compatible = "amd,imageon-200.0", "amd,imageon";
> + reg = <0x30000000 0x20000>;
> + reg-names = "kgsl_3d0_reg_memory";
> + interrupts = <12>;
> + interrupt-names = "kgsl_3d0_irq";
> + clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
> + clock-names = "core_clk", "mem_iface_clk";
> +
> + qcom,gpu-pwrlevels {
> + compatible = "qcom,gpu-pwrlevels";
> + qcom,gpu-pwrlevel@0 {
> + qcom,gpu-freq = <200000000>;
> + };
Same.
> + };
> + };
> };
> };
> --
> 2.17.1
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Powered by blists - more mailing lists