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Message-Id: <1543877696-17174-1-git-send-email-mathieu.poirier@linaro.org>
Date: Mon, 3 Dec 2018 15:54:50 -0700
From: Mathieu Poirier <mathieu.poirier@...aro.org>
To: acme@...nel.org, peterz@...radead.org, gregkh@...uxfoundation.org
Cc: mingo@...hat.com, tglx@...utronix.de,
alexander.shishkin@...ux.intel.com, schwidefsky@...ibm.com,
heiko.carstens@...ibm.com, will.deacon@....com,
mark.rutland@....com, jolsa@...hat.com, namhyung@...nel.org,
adrian.hunter@...el.com, ast@...nel.org, hpa@...or.com,
suzuki.poulosi@....com, linux-s390@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v5 0/6] perf: Add ioctl for PMU driver configuration
In the coresight world there can be more than one sink to aggregate
trace data generated by CPUs, hence the need for users to select which
one to use from the perf command line.
Up until now sysfs was used to communicate sink information to the
kernel but that was never the right way to proceed because it breaks
when more than one perf session are created at the same time. The
situation was manageable when working with per-thread scenarios where
a single HW trace event is created but in CPU-wide mode a HW trace
event is created for each CPU that is specified on the perf command
line, taking us back to the concurrency problem we have when dealing
with multiple per-thread session.
This work fits in a wider scheme to support CPU-wide trace scenarios on
CoreSight that is available here [1]. The first step in that venture is
to address sysfs concurrency issues, which this patchset does.
The main difference with V4 is the usage of a CoreSight sink's HW start
address (u64) to uniquely identify a sink, negating the need to use the
component's name (char *).
By using a u64 we can theoretically add the sink information to the
perf_event_attr structure, avoiding the need to add a new perf ioctl().
On flip side it would introduce a very specific CoreSight field
to a structure that is generic. I have opted for the ioctl() method,
let me know if you want me to proceed with the latter.
Regards,
Mathieu
# Before this set:
root@...o:/home/linaro# perf record -e cs_etm/@...70000.etr/ -C 2,3 sleep 1
failed to mmap with 12 (Cannot allocate memory)
# After this set:
root@...o:/home/linaro# perf record -e cs_etm/@...70000.etr/ -C 2,3 sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 4.145 MB perf.data ]
[1]. https://git.linaro.org/people/mathieu.poirier/coresight.git/log/?h=cpu-wide-coresight
---
Changes for V5:
. Went from a char * to a u64 for ioctl argument (GKH).
. Added a better description of the problem being fixed to
the cover letter (GKH).
Changes for V4:
. Made passing of information between ioctl() and PMU simpler.
Mathieu Poirier (6):
perf: Introduce ioctl to communicate driver configuration to kernel
perf/core: Use ioctl to communicate driver configuration to kernel
perf/aux: Make perf_event accessible to setup_aux()
coresight: Use PMU driver configuration for sink selection
perf tools: Make perf_evsel accessible to PMU driver configuration
code
perf tools: Use ioctl function to send sink information to kernel
arch/s390/kernel/perf_cpum_sf.c | 6 +-
arch/x86/events/intel/bts.c | 4 +-
arch/x86/events/intel/pt.c | 5 +-
drivers/hwtracing/coresight/coresight-etm-perf.c | 80 +++++++++++++++++-----
drivers/perf/arm_spe_pmu.c | 6 +-
include/linux/perf_event.h | 40 ++++++++++-
include/uapi/linux/perf_event.h | 1 +
kernel/events/core.c | 67 +++++++++++++++++++
kernel/events/ring_buffer.c | 2 +-
tools/include/uapi/linux/perf_event.h | 1 +
tools/perf/arch/arm/util/cs-etm.c | 84 +++++++++++++++++++++++-
tools/perf/arch/arm/util/cs-etm.h | 3 +-
tools/perf/util/drv_configs.c | 30 ++-------
tools/perf/util/evsel.c | 6 ++
tools/perf/util/evsel.h | 1 +
tools/perf/util/pmu.h | 3 +-
16 files changed, 287 insertions(+), 52 deletions(-)
--
2.7.4
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