linux-kernel - Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3 controller on HiSilicon SoCs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 3 Dec 2018 11:35:10 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:     Yu Chen <chenyu56@...wei.com>, linux-usb@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     suzhuangluan@...ilicon.com, kongfei@...ilicon.com,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        John Stultz <john.stultz@...aro.org>
Subject: Re: [PATCH v1 01/12] dt-bindings: usb: add support for dwc3
 controller on HiSilicon SoCs

Hello!

On 03.12.2018 6:45, Yu Chen wrote:

> This patch adds binding descriptions to support the dwc3 controller
> on HiSilicon SoCs and boards like the HiKey960.
> 
> Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: John Stultz <john.stultz@...aro.org>
> Signed-off-by: Yu Chen <chenyu56@...wei.com>
> ---
>   .../devicetree/bindings/usb/dwc3-hisi.txt          | 67 ++++++++++++++++++++++
>   1 file changed, 67 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/usb/dwc3-hisi.txt
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc3-hisi.txt b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt
> new file mode 100644
> index 000000000000..d32d2299a0a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/dwc3-hisi.txt
> @@ -0,0 +1,67 @@
> +HiSilicon DWC3 USB SoC controller
> +
> +This file documents the parameters for the dwc3-hisi driver.
> +
> +Required properties:
> +- compatible:	should be "hisilicon,hi3660-dwc3"
> +- clocks:	A list of phandle + clock-specifier pairs for the
> +		clocks listed in clock-names
> +- clock-names:	Specify clock names
> +- resets:	list of phandle and reset specifier pairs.
> +
> +Sub-nodes:
> +The dwc3 core should be added as subnode to HiSilicon DWC3 as shown in the
> +example below. The DT binding details of dwc3 can be found in:
> +Documentation/devicetree/bindings/usb/dwc3.txt
> +
> +Example:
> +	usb3: hisi_dwc3 {
> +		compatible = "hisilicon,hi3660-dwc3";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		clocks = <&crg_ctrl HI3660_CLK_ABB_USB>,
> +			 <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
> +		clock-names = "clk_usb3phy_ref", "aclk_usb3otg";
> +		assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
> +		assigned-clock-rates = <229000000>;
> +		resets = <&crg_rst 0x90 8>,
> +			 <&crg_rst 0x90 7>,
> +			 <&crg_rst 0x90 6>,
> +			 <&crg_rst 0x90 5>;
> +
> +		dwc3: dwc3@...00000 {

     According to the DT spec, the node names should be generic, not chip 
specific, i.e. usb@...00000 in this case.

[...]

MBR, Sergei