linux-kernel - [PATCHv3 2/4] arm64: dts: Add the PCIE EP node in dts

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Message-Id: <20181203103505.46885-2-xiaowei.bao@nxp.com>
Date:   Mon,  3 Dec 2018 18:35:03 +0800
From:   Xiaowei Bao <xiaowei.bao@....com>
To:     bhelgaas@...gle.com, robh+dt@...nel.org, mark.rutland@....com,
        shawnguo@...nel.org, leoyang.li@....com, kishon@...com,
        lorenzo.pieralisi@....com, arnd@...db.de,
        gregkh@...uxfoundation.org, minghuan.Lian@....com,
        mingkai.hu@....com, roy.zang@....com, kstewart@...uxfoundation.org,
        cyrille.pitchen@...e-electrons.com, pombredanne@...b.com,
        shawn.lin@...k-chips.com, niklas.cassel@...s.com,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linuxppc-dev@...ts.ozlabs.org
Cc:     Xiaowei Bao <xiaowei.bao@....com>
Subject: [PATCHv3 2/4] arm64: dts: Add the PCIE EP node in dts

Add the PCIE EP node in dts for ls1046a.

Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
---
v2:
 - Add the SoC specific compatibles. 
v3:
 - no change

 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |   32 ++++++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 8cfc848..c9ca9ed 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -657,6 +657,17 @@
 			status = "disabled";
 		};
 
+		pcie_ep@...0000 {
+			compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
+			reg = <0x00 0x03400000 0x0 0x00100000
+				0x40 0x00000000 0x8 0x00000000>;
+			reg-names = "regs", "addr_space";
+			num-ib-windows = <6>;
+			num-ob-windows = <6>;
+			num-lanes = <2>;
+			status = "disabled";
+		};
+
 		pcie@...0000 {
 			compatible = "fsl,ls1046a-pcie";
 			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
@@ -683,6 +694,17 @@
 			status = "disabled";
 		};
 
+		pcie_ep@...0000 {
+			compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep";
+			reg = <0x00 0x03500000 0x0 0x00100000
+				0x48 0x00000000 0x8 0x00000000>;
+			reg-names = "regs", "addr_space";
+			num-ib-windows = <6>;
+			num-ob-windows = <6>;
+			num-lanes = <2>;
+			status = "disabled";
+		};
+
 		pcie@...0000 {
 			compatible = "fsl,ls1046a-pcie";
 			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
@@ -709,6 +731,16 @@
 			status = "disabled";
 		};
 
+		pcie_ep@...0000 {
+			compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep";
+			reg = <0x00 0x03600000 0x0 0x00100000
+				0x50 0x00000000 0x8 0x00000000>;
+			reg-names = "regs", "addr_space";
+			num-ib-windows = <6>;
+			num-ob-windows = <6>;
+			num-lanes = <2>;
+			status = "disabled";
+		};
 	};
 
 	reserved-memory {
-- 
1.7.1