lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <154386550302.88331.785218354920872757@swboyd.mtv.corp.google.com>
Date:   Mon, 03 Dec 2018 11:31:43 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     "A.s. Dong" <aisheng.dong@....com>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Anson Huang <anson.huang@....com>,
        Jacky Bai <ping.bai@....com>, dl-linux-imx <linux-imx@....com>,
        "A.s. Dong" <aisheng.dong@....com>
Subject: Re: [PATCH V6 0/9] clk: add imx7ulp clk support

Quoting A.s. Dong (2018-11-14 05:01:31)
> This patch series intends to add imx7ulp clk support.
> 
> i.MX7ULP Clock functions are under joint control of the System
> Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
> modules, and Core Mode Controller (CMC)1 blocks
> 
> The clocking scheme provides clear separation between M4 domain
> and A7 domain. Except for a few clock sources shared between two
> domains, such as the System Oscillator clock, the Slow IRC (SIRC),
> and and the Fast IRC clock (FIRCLK), clock sources and clock
> management are separated and contained within each domain.
> 
> M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
> A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
> 
> Note: this series only adds A7 clock domain support as M4 clock
> domain will be handled by M4 seperately.
> 

I got:

drivers/clk/imx/clk-pllv4.c:152:15: warning: symbol 'imx_clk_pllv4' was not declared. Should it be static?
drivers/clk/imx/clk-pfdv2.c:166:15: warning: symbol 'imx_clk_pfdv2' was not declared. Should it be static?
drivers/clk/imx/clk-divider-gate.c:174:15: warning: symbol 'imx_clk_divider_gate' was not declared. Should it be static?
drivers/clk/imx/clk-composite-7ulp.c:22:15: warning: symbol 'imx7ulp_clk_composite' was not declared. Should it be static?

which I can fix easily by throwing in clk.h into each file.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ