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Message-ID: <154386551184.88331.6087190803273481557@swboyd.mtv.corp.google.com>
Date: Mon, 03 Dec 2018 11:31:51 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: "A.s. Dong" <aisheng.dong@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"mturquette@...libre.com" <mturquette@...libre.com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
Anson Huang <anson.huang@....com>,
Jacky Bai <ping.bai@....com>, dl-linux-imx <linux-imx@....com>,
"A.s. Dong" <aisheng.dong@....com>,
Stephen Boyd <sboyd@...eaurora.org>
Subject: Re: [PATCH V6 3/9] clk: imx: add pllv4 support
Quoting A.s. Dong (2018-11-14 05:01:43)
> pllv4 is designed for System Clock Generation (SCG) module observed
> in IMX ULP SoC series. e.g. i.MX7ULP.
>
> The SCG modules generates clock used to derive processor, system,
> peripheral bus and external memory interface clocks while this patch
> intends to support the PLL part.
>
> Cc: Stephen Boyd <sboyd@...eaurora.org>
> Cc: Michael Turquette <mturquette@...libre.com>
> Cc: Shawn Guo <shawnguo@...nel.org>
> Cc: Anson Huang <Anson.Huang@....com>
> Cc: Bai Ping <ping.bai@....com>
> Signed-off-by: Dong Aisheng <aisheng.dong@....com>
>
> ---
Applied to clk-next
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