lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 4 Dec 2018 19:08:50 +0000
From:   Leonard Crestez <leonard.crestez@....com>
To:     "stefan@...er.ch" <stefan@...er.ch>
CC:     Richard Zhu <hongxing.zhu@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jingoohan1@...il.com" <jingoohan1@...il.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
        "tpiepho@...inj.com" <tpiepho@...inj.com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>
Subject: Re: [PATCH v4 3/3] PCI: imx6: limit DBI register length

On Tue, 2018-12-04 at 17:55 +0100, Stefan Agner wrote:
> Define the length of the DBI registers. This makes sure that
> the kernel does not access registers beyond that point, avoiding
> the following abort on a i.MX 6Quad:
>   # cat /sys/devices/soc0/soc/1ffc000.pcie/pci0000\:00/0000\:00\:00.0/config
>   [  100.021433] Unhandled fault: imprecise external abort (0x1406) at 0xb6ea7000
>   ...
>   [  100.056423] PC is at dw_pcie_read+0x50/0x84
>   [  100.060790] LR is at dw_pcie_rd_own_conf+0x44/0x48
> 
>  static const struct imx6_pcie_drvdata drvdata[] = {
> -	[IMX6Q] = { .variant = IMX6Q },
> +	[IMX6Q] = { .variant = IMX6Q, .dbi_length = 0x15c },
>  	[IMX6SX] = { .variant = IMX6SX },
>  	[IMX6QP] = { .variant = IMX6QP },
>  	[IMX7D] = { .variant = IMX7D },

Also seems to affect IMX6QP variant (but not others).

Lucas suggested 0x15c because that's the last register documented in
the datasheet but the real HW limit is 0x200, wouldn't it make more
sense to use that?

--
Regards,
Leonard

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ