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Date:   Tue, 4 Dec 2018 15:46:51 -0600
From:   Rob Herring <robh@...nel.org>
To:     Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Cc:     linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devel@...verdev.osuosl.org,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Maxime Ripard <maxime.ripard@...tlin.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Paul Kocialkowski <paul.kocialkowski@...tlin.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-sunxi@...glegroups.com, Hans Verkuil <hverkuil@...all.nl>,
        Sakari Ailus <sakari.ailus@...ux.intel.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 05/15] dt-bindings: sram: sunxi: Add bindings for the H5
 with SRAM C1

On Thu, 15 Nov 2018 15:50:03 +0100, Paul Kocialkowski wrote:
> This introduces new bindings for the H5 SoC in the SRAM controller.
> Because the SRAM layout is different from other SoCs, no backward
> compatibility is assumed with any of them.
> 
> However, the C1 SRAM section alone looks similar to previous SoCs,
> so it is compatible with the initial A10 binding.
> 
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
> ---
>  Documentation/devicetree/bindings/sram/sunxi-sram.txt | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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