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Message-ID: <87muplwjsw.fsf@vitty.brq.redhat.com>
Date:   Tue, 04 Dec 2018 13:36:15 +0100
From:   Vitaly Kuznetsov <vkuznets@...hat.com>
To:     Roman Kagan <rkagan@...tuozzo.com>
Cc:     "kvm\@vger.kernel.org" <kvm@...r.kernel.org>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        "linux-kernel\@vger.kernel.org" <linux-kernel@...r.kernel.org>,
        "K. Y. Srinivasan" <kys@...rosoft.com>,
        Haiyang Zhang <haiyangz@...rosoft.com>,
        Stephen Hemminger <sthemmin@...rosoft.com>,
        "x86\@kernel.org" <x86@...nel.org>,
        "Michael Kelley \(EOSG\)" <Michael.H.Kelley@...rosoft.com>
Subject: Re: [PATCH v2 3/4] x86/kvm/hyper-v: direct mode for synthetic timers

Roman Kagan <rkagan@...tuozzo.com> writes:

> On Mon, Nov 26, 2018 at 04:47:31PM +0100, Vitaly Kuznetsov wrote:
>> @@ -379,6 +398,14 @@ void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
>>  	for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
>>  		if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
>>  			kvm_hv_notify_acked_sint(vcpu, i);
>> +
>> +	for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++) {
>> +		stimer = &hv_vcpu->stimer[i];
>> +		if (stimer->msg_pending && stimer->config.enable &&
>> +		    stimer->config.direct_mode &&
>> +		    stimer->config.apic_vector == vector)
>> +			stimer_mark_pending(stimer, false);
>> +	}
>>  }
>
> While debugging another issue with synic timers, it just occurred to me
> that with direct timers no extra processing is necessary on EOI: unlike
> traditional synic timers which may have failed to deliver a message and
> want to be notified when they can retry, direct timers just set the irq
> directly in the apic.
>
> So this hunk shouldn't be needed, should it?

Hm, you're probably right: kvm_apic_set_irq() fails only when apic is
disabled (see APIC_DM_FIXED case in __apic_accept_irq()) and I'm not
convinced we should re-try in this synthetic case.

Let me test the hypothesis with Hyper-V on KVM, I'll come back with
either a patch removing this over-engineered part or a reson for it to
stay. Will do later this week.

Thanks!

-- 
Vitaly

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