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Message-ID: <5C07FC30.43601034@users.sourceforge.net>
Date: Wed, 05 Dec 2018 18:26:24 +0200
From: Jari Ruusu <jariruusu@...rs.sourceforge.net>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
CC: linux-kernel@...r.kernel.org, stable@...r.kernel.org,
Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Borislav Petkov <bp@...e.de>, Ingo Molnar <mingo@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Andy Lutomirski <luto@...nel.org>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>,
"Jason A. Donenfeld" <Jason@...c4.com>,
kvm ML <kvm@...r.kernel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
" Radim Kr?má?" <rkrcmar@...hat.com>,
Rik van Riel <riel@...riel.com>, x86-ml <x86@...nel.org>
Subject: Re: [PATCH 4.14 121/146] x86/fpu: Disable bottom halves while loading
FPU registers
Greg Kroah-Hartman wrote:
> commit 68239654acafe6aad5a3c1dc7237e60accfebc03 upstream.
>
> The sequence
>
> fpu->initialized = 1; /* step A */
> preempt_disable(); /* step B */
> fpu__restore(fpu);
> preempt_enable();
>
> in __fpu__restore_sig() is racy in regard to a context switch.
That same race appears to be present in older kernel branches also.
The context is sligthly different, so the patch for 4.14 does not
apply cleanly to older kernels. For 4.9 branch, this edit works:
s/fpu->initialized/fpu->fpstate_active/
--- a/arch/x86/kernel/fpu/signal.c
+++ b/arch/x86/kernel/fpu/signal.c
@@ -342,10 +342,10 @@ static int __fpu__restore_sig(void __use
sanitize_restored_xstate(tsk, &env, xfeatures, fx_only);
}
+ local_bh_disable();
fpu->fpstate_active = 1;
- preempt_disable();
fpu__restore(fpu);
- preempt_enable();
+ local_bh_enable();
return err;
} else {
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