linux-kernel - [PATCH] arm64: dts: sdm845: Add lpasscc node

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Date:   Wed,  5 Dec 2018 13:30:36 +0530
From:   Taniya Das <tdas@...eaurora.org>
To:     Andy Gross <andy.gross@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, Stephen Boyd <sboyd@...nel.org>,
        Douglas Anderson <dianders@...omium.org>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>, david.brown@...aro.org,
        Mark Rutland <mark.rutland@....com>, linux-soc@...r.kernel.org,
        Taniya Das <tdas@...eaurora.org>
Subject: [PATCH] arm64: dts: sdm845: Add lpasscc node

This adds the low pass audio clock controller node to sdm845 based on
the example in the bindings.

Signed-off-by: Taniya Das <tdas@...eaurora.org>
---
 arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 4 +++-
 arch/arm64/boot/dts/qcom/sdm845.dtsi    | 8 ++++++++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
index b3def03..cf73f3c 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
@@ -346,7 +346,9 @@
 &gcc {
 	protected-clocks = <GCC_QSPI_CORE_CLK>,
 			   <GCC_QSPI_CORE_CLK_SRC>,
-			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
+			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+			   <GCC_LPASS_Q6_AXI_CLK>,
+			   <GCC_LPASS_SWAY_CLK>;
 };

 &i2c10 {
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 1419b00..a3db089 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -7,6 +7,7 @@

 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
+#include <dt-bindings/clock/qcom,lpass-sdm845.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy-qcom-qusb2.h>
@@ -1264,6 +1265,13 @@
 			#power-domain-cells = <1>;
 		};

+		lpasscc: clock-controller@...14000 {
+			compatible = "qcom,sdm845-lpasscc";
+			reg = <0x17014000 0x1f004>, <0x17300000 0x200>;
+			reg-names = "cc", "qdsp6ss";
+			#clock-cells = <1>;
+		};
+
 		tsens0: thermal-sensor@...3000 {
 			compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
 			reg = <0xc263000 0x1ff>, /* TM */
--
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