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Message-Id: <20181205101152.22983-1-wens@csie.org>
Date: Wed, 5 Dec 2018 18:11:49 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Maxime Ripard <maxime.ripard@...tlin.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: Chen-Yu Tsai <wens@...e.org>, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: [PATCH 0/3] ARM: sun8i: a33: Audio codec improvements
Hi everyone,
This series improves audio support on the A33. Like other Allwinner
SoCs, the A33 requires the use of a sigma-delta modulation fractional-N
PLL to generate the correct clock used for audio playback. Otherwise the
pitch would be slightly off.
Patch 1 enables sigma-delta modulation for the audio PLL on the A33.
Patch 2 is only slightly related. It sets the CLK_SET_RATE_PARENT flag
for all audio-related module clocks
Patch 3 lowers the audio codec's oversampling rate, so that it can
play back audio sampled at beyond 48 KHz.
This is the same as what has recently been done for the A64, which
shares the same audio codec hardware design.
However, on the A33 it seems the PLL doesn't always immediately lock on
to the new clock frequency when there is a rate change. Also since the
codec is only put in standby instead of turned off, runtime PM never
kicks in, and the audio related clocks never get turned off. I'm still
looking into this.
On an unrelated note, if you get pops when playing back audio on sunxi,
it might be related to cpufreq. Try setting the governor to performance
and see if that removes the pops.
Regards
ChenYu
Chen-Yu Tsai (3):
clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL
clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module
clocks
ARM: dts: sun8i: a33: Drop audio codec oversampling rate to 128 fs
arch/arm/boot/dts/sun8i-a33.dtsi | 2 +-
drivers/clk/sunxi-ng/ccu-sun8i-a33.c | 43 +++++++++++++++++-----------
2 files changed, 28 insertions(+), 17 deletions(-)
--
2.20.0.rc1
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