linux-kernel - Re: [PATCH v2 00/15] Cedrus H5 and A64 support with A33 and H3 updates

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Message-ID: <20181205110712.dfzdkixpsayue5k7@flea>
Date:   Wed, 5 Dec 2018 12:07:12 +0100
From:   Maxime Ripard <maxime.ripard@...tlin.com>
To:     Chen-Yu Tsai <wens@...e.org>
Cc:     Paul Kocialkowski <paul.kocialkowski@...tlin.com>,
        Linux Media Mailing List <linux-media@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        devel@...verdev.osuosl.org,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        linux-sunxi <linux-sunxi@...glegroups.com>,
        Hans Verkuil <hverkuil@...all.nl>,
        Sakari Ailus <sakari.ailus@...ux.intel.com>
Subject: Re: [PATCH v2 00/15] Cedrus H5 and A64 support with A33 and H3
 updates

On Wed, Dec 05, 2018 at 05:48:34PM +0800, Chen-Yu Tsai wrote:
> On Wed, Dec 5, 2018 at 5:25 PM Paul Kocialkowski
> <paul.kocialkowski@...tlin.com> wrote:
> >
> > This series adds support for the Allwinner H5 and A64 platforms to the
> > cedrus stateless video codec driver, with minor updates to the A33 and
> > H3 platforms.
> >
> > It requires changes to the SRAM driver bindings and driver, to properly
> > support the H5 and the A64 C1 SRAM section. Because a H5-specific
> > system-control node is introduced, the dummy syscon node that was shared
> > between the H3 and H5 is removed in favor of each platform-specific node.
> > A few fixes are included to ensure that the EMAC clock configuration
> > register is still accessible through the sunxi SRAM driver (instead of the
> > dummy syscon node, that was there for this purpose) on the H3 and H5.
> >
> > The reserved memory nodes for the A33 and H3 are also removed in this
> > series, since they are not actually necessary.
> >
> > Changes since v1:
> > * Removed the reserved-memory nodes for the A64 and H5;
> > * Removed the reserved-memory nodes for the A33 and H3;
> > * Corrected the SRAM bases and sizes to the best of our knowledge;
> > * Dropped cosmetic dt changes already included in the sunxi tree.
> >
> > Paul Kocialkowski (15):
> >   ARM: dts: sun8i: h3: Fix the system-control register range
> >   ARM: dts: sun8i: a33: Remove unnecessary reserved memory node
> >   ARM: dts: sun8i: h3: Remove unnecessary reserved memory node
> >   soc: sunxi: sram: Enable EMAC clock access for H3 variant
> >   dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
> >   soc: sunxi: sram: Add support for the H5 SoC system control
> >   arm64: dts: allwinner: h5: Add system-control node with SRAM C1
> >   ARM/arm64: sunxi: Move H3/H5 syscon label over to soc-specific nodes
> >   dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
> >   arm64: dts: allwinner: a64: Add support for the SRAM C1 section
> >   dt-bindings: media: cedrus: Add compatibles for the A64 and H5
> >   media: cedrus: Add device-tree compatible and variant for H5 support
> >   media: cedrus: Add device-tree compatible and variant for A64 support
> >   arm64: dts: allwinner: h5: Add Video Engine node
> >   arm64: dts: allwinner: a64: Add Video Engine node
> 
> Other than the error in patch 7,
> 
> Acked-by: Chen-Yu Tsai <wens@...e.org>

Applied all the patches but 11-13, with the changes discussed on patch 7 fixed.

Thanks!
Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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