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Message-ID: <CAHk-=wgrpUQyux2ZTJj8FUEdHcEoM0KUNrN3KCc+bBhi0fRhaQ@mail.gmail.com>
Date: Thu, 6 Dec 2018 10:15:08 -0800
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Ingo Molnar <mingo@...nel.org>
Cc: sean.j.christopherson@...el.com, dave.hansen@...ux.intel.com,
Andrew Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, bp@...en8.de,
"the arch/x86 maintainers" <x86@...nel.org>,
Peter Anvin <hpa@...or.com>,
Linux List Kernel Mailing <linux-kernel@...r.kernel.org>,
Rik van Riel <riel@...riel.com>, yu-cheng.yu@...el.com
Subject: Re: [PATCH] x86/mm/fault: Streamline the fault error_code decoder
some more
On Wed, Dec 5, 2018 at 11:34 PM Ingo Molnar <mingo@...nel.org> wrote:
>
> Yeah, so I don't like the overly long 'SUPERVISOR' and the somewhat
> inconsistent, sporadic handling of negatives. Here's our error code bits:
>
> /*
> * Page fault error code bits:
> *
> * bit 0 == 0: no page found 1: protection fault
> * bit 1 == 0: read access 1: write access
> * bit 2 == 0: kernel-mode access 1: user-mode access
No. Really not at all.
Bit 2 is *not* "kernel vs user". Never has been. Never will be.
It's a single bit that mixes up *three* different cases:
- regular user mode access (value: 1)
- regular CPL0 access (value: 0)
- CPU system access (value: 0)
and that third case really is important and relevant. And importantly,
it can happen from user space.
In fact, these days we possibly have a fourth case:
- kernel access using wruss (value: 1)
and I'd rather see just the numbers (which you have to know to decode)
than see the simplified AND WRONG decoding of those numbers.
Please don't ever confuse the fault U/S bit with "user vs kernel".
It's just not true, and people should be very very aware of it now
being true.
If you care whether a page fault happened in user mode or not, you
have to look at the register state (ie "user_mode(regs)").
Please call the U/S bit something else than "user" or "kernel".
Linus
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